| Parameters |
| Packaging |
Bulk |
| Published |
2016 |
| Series |
Zynq® UltraScale+™ MPSoC CG |
| Pbfree Code |
yes |
| Part Status |
Active |
| Moisture Sensitivity Level (MSL) |
4 (72 Hours) |
| HTS Code |
8542.31.00.01 |
| Peak Reflow Temperature (Cel) |
NOT SPECIFIED |
| Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
| Number of I/O |
252 |
| Speed |
533MHz, 1.3GHz |
| RAM Size |
256KB |
| Core Processor |
Dual ARM® Cortex®-A53 MPCore™ with CoreSight™, Dual ARM®Cortex™-R5 with CoreSight™ |
| Peripherals |
DMA, WDT |
| Connectivity |
CANbus, EBI/EMI, Ethernet, I2C, MMC/SD/SDIO, SPI, UART/USART, USB OTG |
| Architecture |
MCU, FPGA |
| Primary Attributes |
Zynq®UltraScale+™ FPGA, 154K+ Logic Cells |
| RoHS Status |
ROHS3 Compliant |
| Factory Lead Time |
11 Weeks |
| Package / Case |
784-BFBGA, FCBGA |
| Operating Temperature |
0°C~100°C TJ |
This SoC is built on Dual ARM? Cortex?-A53 MPCore? with CoreSight?, Dual ARM?Cortex?-R5 with CoreSight? core processor(s).
A core processor Dual ARM? Cortex?-A53 MPCore? with CoreSight?, Dual ARM?Cortex?-R5 with CoreSight? is used to build this SoC.The manufacturer assigns this system on a chip with a 784-BFBGA, FCBGA package.With 256KB RAM implemented, this SoC chip provides reliable operation.A MCU, FPGA technique is used for the SoC design's internal architecture.The system on a chip is part of the series Zynq? UltraScale+? MPSoC CG.This SoC meaning should have an average operating temperature of 0°C~100°C TJ.A significant feature of this SoC security is the combination of Zynq?UltraScale+? FPGA, 154K+ Logic Cells.This SoC system on a chip has been designed in a state-of-the-art Bulk package.As a whole, this SoC part includes 252 I/Os.
Dual ARM? Cortex?-A53 MPCore? with CoreSight?, Dual ARM?Cortex?-R5 with CoreSight? processor.
256KB RAM.
Built on MCU, FPGA.
There are a lot of Xilinx Inc.
XCZU3CG-2SFVC784E System On Chip (SoC) applications.
- Special Issue Editors
- Cyberphysical system-on-chip
- Special Issue Information
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