XCR3512XL-12FGG324C
| Parameters | |
|---|---|
| Number of Pins | 324 |
| Published | 1996 |
| JESD-609 Code | e1 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 324 |
| ECCN Code | 3A991.D |
| Terminal Finish | Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5) |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Additional Feature | YES |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 250 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 1mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 324 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 3.3V |
| Supply Voltage-Max (Vsup) | 3.6V |
| Temperature Grade | COMMERCIAL |
| Number of I/O | 260 |
| Memory Type | EEPROM |
| Propagation Delay | 12 ns |
| Frequency (Max) | 77MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 12000 |
| Number of Logic Blocks (LABs) | 32 |
| Speed Grade | 12 |
| Output Function | MACROCELL |
| Number of Macro Cells | 512 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height Seated (Max) | 2.5mm |
| Length | 23mm |
| Width | 23mm |
| RoHS Status | RoHS Compliant |
| Factory Lead Time | 6 Weeks |
| Mount | Surface Mount |
| Package / Case | FBGA |
XCR3512XL-12FGG324C Overview
There are 512 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).FBGAis the package in which it resides.This device has 260 I/O ports programmed into it.There is a 324terminations set on devices.The terminal position of this electrical part is BOTTOM, which serves as an important access point for passengers or freight.A voltage of 3.3V is used as the power supply for this device.It is a part of family [0].A chip with 324pins is programmed.This device is also capable of displaying [0].12000gates are used to construct digital circuits.In order to achieve high efficiency, the supply voltage should be maintained at [0].For storing data, it is recommended to use [0].Surface Mountmounts this electronic component.It is designed with 324 pins.A maximum supply voltage (Vsup) of 3.6V is provided.The operating temperature should be higher than 0°C.It is recommended that the operating temperature be below 70°C.There are 32 logic blocks (LABs) in its basic building block.It is recommended that the maximal frequency be less than 0.There are several types of programmable logic that can be categorized as EE PLD.
XCR3512XL-12FGG324C Features
FBGA package
260 I/Os
324 pin count
324 pins
32 logic blocks (LABs)
XCR3512XL-12FGG324C Applications
There are a lot of Xilinx XCR3512XL-12FGG324C CPLDs applications.
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- Protection relays
- Multiple Clock Source Selection
- DMA control
- I/O PORTS (MCU MODULE)
- Programmable polarity
- Dedicated input registers
- Timing control
- Handheld digital devices
- ToR/Aggregation/Core Switch and Router