XCR3384XL-12FGG324C

XCR3384XL-12FGG324C

1mm PMIC 3.3V FBGA


  • Manufacturer: Xilinx
  • Origchip NO: 903-XCR3384XL-12FGG324C
  • Package: FBGA
  • Datasheet: PDF
  • Stock: 746
  • Description: 1mm PMIC 3.3V FBGA (Kg)

Details

Tags

Parameters
Package / Case FBGA
Surface Mount YES
JESD-609 Code e1
Pbfree Code yes
Moisture Sensitivity Level (MSL) 3
Number of Terminations 324
ECCN Code 3A991.D
Terminal Finish Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5)
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Additional Feature YES
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 250
Supply Voltage 3.3V
Terminal Pitch 1mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 324
Operating Supply Voltage 3.3V
Supply Voltage-Max (Vsup) 3.6V
Temperature Grade COMMERCIAL
Number of I/O 220
Memory Type EEPROM
Propagation Delay 12 ns
Frequency (Max) 83MHz
Organization 0 DEDICATED INPUTS, 220 I/O
Programmable Logic Type EE PLD
Number of Logic Blocks (LABs) 24
Speed Grade 12
Output Function MACROCELL
Number of Macro Cells 384
JTAG BST YES
In-System Programmable YES
Height Seated (Max) 2.5mm
Length 23mm
Width 23mm
Radiation Hardening No
RoHS Status RoHS Compliant

XCR3384XL-12FGG324C Overview


A mobile phone network consists of 384macro cells, which are radio coverage cells served by a high-power cell site (tower, antenna or mast).A FBGA package contains the item.As a result, it has 220 I/O ports programmed.There is a 324terminations set on devices.Its terminal position is BOTTOM.It is powered by a voltage of 3.3V volts.It is included in Programmable Logic Devices.It has 324pins programmed.This device is also capable of displaying [0].The supply voltage should be maintained at 3.3V for high efficiency.In this case, EEPROMwill be used to store the data.In order to ensure proper operation, a maximum supply voltage (Vsup) of 3.6V is required.Operating temperatures should be higher than 0°C.A temperature lower than 70°Cis recommended for operation.In total, it contains 24 logic blocks (LABs).The maximal frequency should be lower than 83MHz.Programmable logic types can be divided into EE PLD.

XCR3384XL-12FGG324C Features


FBGA package
220 I/Os
324 pin count
24 logic blocks (LABs)

XCR3384XL-12FGG324C Applications


There are a lot of Xilinx XCR3384XL-12FGG324C CPLDs applications.

  • I/O expansion
  • Field programmable gate
  • Dedicated input registers
  • High speed graphics processing
  • Software Configuration of Add-In Boards
  • Reset swapping
  • Timing control
  • Synchronous or asynchronous mode
  • Address decoding
  • Random logic replacement

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