| Parameters |
| Pin Count |
84 |
| Operating Supply Voltage |
5V |
| Temperature Grade |
INDUSTRIAL |
| Number of I/O |
69 |
| Memory Type |
FLASH |
| Propagation Delay |
10 ns |
| Frequency (Max) |
66.7MHz |
| Organization |
0 DEDICATED INPUTS, 69 I/O |
| Number of Logic Blocks (LABs) |
8 |
| Speed Grade |
10 |
| Output Function |
MACROCELL |
| Number of Macro Cells |
72 |
| JTAG BST |
YES |
| In-System Programmable |
YES |
| Length |
29.3116mm |
| Width |
29.3116mm |
| Radiation Hardening |
No |
| RoHS Status |
RoHS Compliant |
| Package / Case |
PLCC |
| Surface Mount |
YES |
| Number of Pins |
84 |
| Published |
1998 |
| JESD-609 Code |
e3 |
| Pbfree Code |
yes |
| Part Status |
Discontinued |
| Moisture Sensitivity Level (MSL) |
3 |
| Number of Terminations |
84 |
| ECCN Code |
EAR99 |
| Terminal Finish |
Matte Tin (Sn) |
| Max Operating Temperature |
85°C |
| Min Operating Temperature |
-40°C |
| Additional Feature |
YES |
| Subcategory |
Programmable Logic Devices |
| Technology |
CMOS |
| Terminal Position |
QUAD |
| Terminal Form |
J BEND |
| Peak Reflow Temperature (Cel) |
245 |
| Supply Voltage |
5V |
| Terminal Pitch |
1.27mm |
| Time@Peak Reflow Temperature-Max (s) |
30 |
XC9572-10PCG84I Overview
72 macrocells are present in the mobile phone network, which offer radio coverage from a high-power cell tower, antenna, or mast.There is a PLCC package containing it.There are 69 I/Os on the board.There are 84 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line.This electrical component has a terminal position of 0.It is powered by a voltage of 5V volts.This part is in the family [0].The chip is programmed with 84 pins.When using this device, YESis also available.If high efficiency is desired, the supply voltage should be kept at [0].Data storage is performed using [0].84pins are included in its design.Ideally, the operating temperature should be greater than -40°C.A temperature less than 85°Cshould be used for operation.The system consists of 8 logic blocks (LABs).The maximal frequency should be lower than 66.7MHz.
XC9572-10PCG84I Features
PLCC package
69 I/Os
84 pin count
84 pins
8 logic blocks (LABs)
XC9572-10PCG84I Applications
There are a lot of Xilinx XC9572-10PCG84I CPLDs applications.
- I2C BUS INTERFACE
- ROM patching
- Auxiliary Power Supply Isolated and Non-isolated
- Multiple DIP Switch Replacement
- Reset swapping
- Network Interface Card (NIC) and Host Bus Adapter (HBA)
- Interface bridging
- Power Meter SMPS
- SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management
- ON-CHIP OSCILLATOR CIRCUIT