| Parameters |
| Factory Lead Time |
6 Weeks |
| Lifecycle Status |
ACTIVE (Last Updated: 5 days ago) |
| Mount |
Surface Mount |
| Mounting Type |
Surface Mount |
| Package / Case |
20-SOIC (0.295, 7.50mm Width) |
| Number of Pins |
20 |
| Weight |
500.709277mg |
| Operating Temperature |
-40°C~85°C TA |
| Packaging |
Tube |
| Series |
74LVTH |
| JESD-609 Code |
e4 |
| Pbfree Code |
yes |
| Part Status |
Active |
| Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
| Number of Terminations |
20 |
| Type |
D-Type |
| Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory |
FF/Latches |
| Technology |
BICMOS |
| Voltage - Supply |
2.7V~3.6V |
| Terminal Position |
DUAL |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
260 |
| Supply Voltage |
3.3V |
| Base Part Number |
74LVTH574 |
| Function |
Standard |
| Output Type |
Tri-State, Non-Inverted |
| Operating Supply Voltage |
3.3V |
| Number of Elements |
1 |
| Polarity |
Non-Inverting |
| Supply Voltage-Min (Vsup) |
2.7V |
| Number of Circuits |
8 |
| Load Capacitance |
50pF |
| Number of Ports |
2 |
| Output Current |
64mA |
| Number of Bits |
8 |
| Clock Frequency |
150MHz |
| Propagation Delay |
3 ns |
| Turn On Delay Time |
3 ns |
| Family |
LVT |
| Logic Function |
D-Type, Flip-Flop |
| Current - Quiescent (Iq) |
190μA |
| Current - Output High, Low |
32mA 64mA |
| Max I(ol) |
0.064 A |
| Max Propagation Delay @ V, Max CL |
4.5ns @ 3.3V, 50pF |
| Prop. Delay@Nom-Sup |
4.5 ns |
| Trigger Type |
Positive Edge |
| Input Capacitance |
3pF |
| Power Supply Current-Max (ICC) |
5mA |
| Number of Output Lines |
3 |
| Count Direction |
UNIDIRECTIONAL |
| Clock Edge Trigger Type |
Positive Edge |
| Height |
2.65mm |
| Length |
12.8mm |
| Width |
7.5mm |
| Thickness |
2.35mm |
| Radiation Hardening |
No |
| REACH SVHC |
No SVHC |
| RoHS Status |
ROHS3 Compliant |
| Lead Free |
Lead Free |
SN74LVTH574DW Overview
The package is in the form of 20-SOIC (0.295, 7.50mm Width). The Tubepackage contains it. The output it is configured with uses Tri-State, Non-Inverted. This trigger uses the value Positive Edge. There is an electric part mounted in the way of Surface Mount. A supply voltage of 2.7V~3.6V is required for operation. It is at -40°C~85°C TAdegrees Celsius that the system is operating. D-Typeis the type of this D latch. JK flip flop is a part of the 74LVTHseries of FPGAs. It should not exceed 150MHzin its output frequency. The list contains 1 elements. As a result, it consumes 190μA quiescent current. It has been determined that there have been 20 terminations. If you search by 74LVTH574, you will find similar parts. A voltage of 3.3V is used as the power supply for this D latch. JK flip flop input capacitance is 3pF farads. This D flip flop belongs to the family of LVT. A part of the electronic system is mounted in the way of Surface Mount. Basically, it is designed with a set of 20 pins. Its clock edge trigger type is Positive Edge. It is included in FF/Latches. It is designed with 8bits. The supply voltage (Vsup) should be maintained above 2.7V for normal operation. Its flexibility is enhanced by 8 circuits. This flip flop has a total of 2ports. High efficiency requires the supply voltage to be maintained at 3.3V. With an output current of 64mA, this device offers maximum design flexibility. There are 3 output lines in this JK flip flop.
SN74LVTH574DW Features
Tube package
74LVTH series
20 pins
8 Bits
SN74LVTH574DW Applications
There are a lot of Texas Instruments SN74LVTH574DW Flip Flops applications.
- Set-reset capability
- Functionally equivalent to the MC10/100EL29
- Consumer
- Frequency division
- Memory
- Reduced system switching noise
- Safety Clamp
- Communications
- Digital electronics systems
- Count Modes