SN74LVC821ADWR
| Parameters | |
|---|---|
| Factory Lead Time | 6 Weeks |
| Lifecycle Status | ACTIVE (Last Updated: 2 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 24-SOIC (0.295, 7.50mm Width) |
| Number of Pins | 24 |
| Weight | 624.398247mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 24 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Base Part Number | 74LVC821 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 24mA |
| Clock Frequency | 150MHz |
| Propagation Delay | 8.5 ns |
| Turn On Delay Time | 2.2 ns |
| Family | LVC/LCX/Z |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 10 |
| Max Propagation Delay @ V, Max CL | 7.3ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| Number of Output Lines | 3 |
| Count Direction | UNIDIRECTIONAL |
| Clock Edge Trigger Type | Positive Edge |
| Translation | N/A |
| Height | 2.65mm |
| Length | 15.4mm |
| Width | 7.5mm |
| Thickness | 2.35mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LVC821ADWR Overview
As a result, it is packaged as 24-SOIC (0.295, 7.50mm Width). It is contained within the Cut Tape (CT)package. T flip flop is configured with an output of Tri-State, Non-Inverted. JK flip flop uses Positive Edgeas the trigger. This electronic part is mounted in the way of Surface Mount. With a supply voltage of 1.65V~3.6V volts, it operates. -40°C~85°C TAis the operating temperature. It belongs to the type D-Typeof flip flops. It is a type of FPGA belonging to the 74LVC series. You should not exceed 150MHzin the output frequency of the device. The element count is 1 . There is 10μA quiescent consumption. The number of terminations is 24. The 74LVC821 family contains it. A voltage of 1.8V provides power to the D latch. Its input capacitance is 5pF farads. A device of this type belongs to the family of LVC/LCX/Z. Electronic part Surface Mountis mounted in the way. There are 24pins on it. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. It is included in FF/Latches. Due to its superior flexibility, it uses 8 circuits. As a result of its reliable performance, this T flip flop is suitable for TR. The flip flop contains 2ports. In addition to its maximum design flexibility, the output current of the T flip flop is 24mA. It has 3 output lines to operate.
SN74LVC821ADWR Features
Cut Tape (CT) package
74LVC series
24 pins
SN74LVC821ADWR Applications
There are a lot of Texas Instruments SN74LVC821ADWR Flip Flops applications.
- Balanced Propagation Delays
- Shift registers
- ATE
- Power down protection
- Storage Registers
- Pattern generators
- Circuit Design
- Parallel data storage
- Digital electronics systems
- Dynamic threshold performance