Parameters |
Factory Lead Time |
6 Weeks |
Lifecycle Status |
ACTIVE (Last Updated: 4 days ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
14-VFQFN Exposed Pad |
Number of Pins |
14 |
Weight |
32.205058mg |
Operating Temperature |
-40°C~125°C TA |
Packaging |
Cut Tape (CT) |
Series |
74LVC |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
2 (1 Year) |
Number of Terminations |
14 |
ECCN Code |
EAR99 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latch |
Packing Method |
TR |
Technology |
CMOS |
Voltage - Supply |
1.65V~3.6V |
Terminal Position |
QUAD |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
1.8V |
Terminal Pitch |
0.5mm |
Base Part Number |
74LVC74 |
Function |
Set(Preset) and Reset |
Output Type |
Differential |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
3.6V |
Power Supplies |
3.3V |
Number of Circuits |
2 |
Load Capacitance |
50pF |
Output Current |
24mA |
Clock Frequency |
150MHz |
Propagation Delay |
7.1 ns |
Turn On Delay Time |
1 ns |
Family |
LVC/LCX/Z |
Logic Function |
AND, D-Type, Flip-Flop |
Current - Quiescent (Iq) |
10μA |
Current - Output High, Low |
24mA 24mA |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
4.4ns @ 3.3V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
5pF |
Number of Output Lines |
1 |
Clock Edge Trigger Type |
Positive Edge |
Height |
1mm |
Length |
3.5mm |
Width |
3.5mm |
Thickness |
900μm |
Radiation Hardening |
No |
REACH SVHC |
No SVHC |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
SN74LVC74ARGYR Overview
It is embeded in 14-VFQFN Exposed Pad case. The package Cut Tape (CT)contains it. As configured, the output uses Differential. There is a trigger configured with Positive Edge. Surface Mountis occupied by this electronic component. A voltage of 1.65V~3.6Vis required for its operation. It is at -40°C~125°C TAdegrees Celsius that the system is operating. The type of this D latch is D-Type. It is a type of FPGA belonging to the 74LVC series. It should not exceed 150MHzin terms of its output frequency. It consumes 10μA of quiescent current without being affected by external factors. 14terminations have occurred. The 74LVC74 family contains it. It is powered by a voltage of 1.8V . Its input capacitance is 5pFfarads. Electronic devices of this type belong to the LVC/LCX/Zfamily. A part of the electronic system is mounted in the way of Surface Mount. 14pins are included in its design. This device has the clock edge trigger type of Positive Edge. The RS flip flops belongs to FF/Latch base part number. In this case, the maximum supply voltage (Vsup) reaches 3.6V. Using 2 circuits, it is highly flexible. On the basis of its reliable performance, this D flip flop is well suited for use with TR. The D latch operates on 3.3V volts. Its output current of 24mAallows for maximum design flexibility. There are 1 output Lines, which generate the binary equivalent of the input line whose value is equal to “1” and are available to encode either a decimal or hexadecimal input pattern to typically a binary or “B. C. D” (binary coded decimal) output code.
SN74LVC74ARGYR Features
Cut Tape (CT) package
74LVC series
14 pins
3.3V power supplies
SN74LVC74ARGYR Applications
There are a lot of Texas Instruments SN74LVC74ARGYR Flip Flops applications.
- Buffer registers
- Balanced Propagation Delays
- Latch
- Bus hold
- Frequency Dividers
- Safety Clamp
- Frequency division
- Instrumentation
- Data Synchronizers
- Data storage