SN74LVC374AQPWREP
| Parameters | |
|---|---|
| Factory Lead Time | 6 Weeks |
| Lifecycle Status | ACTIVE (Last Updated: 1 day ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 20 |
| Weight | 76.997305mg |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 2V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.7V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LVC374 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 24mA |
| Number of Bits | 8 |
| Clock Frequency | 100MHz |
| Propagation Delay | 9.5 ns |
| Turn On Delay Time | 1.5 ns |
| Family | LVC/LCX/Z |
| Current - Quiescent (Iq) | 10μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 24mA 24mA |
| Max I(ol) | 0.024 A |
| Max Propagation Delay @ V, Max CL | 8.5ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Number of Input Lines | 8 |
| Count Direction | UNIDIRECTIONAL |
| Clock Edge Trigger Type | Positive Edge |
| Translation | N/A |
| Height | 1.2mm |
| Length | 6.5mm |
| Width | 4.4mm |
| Thickness | 1mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LVC374AQPWREP Overview
It is packaged in the way of 20-TSSOP (0.173, 4.40mm Width). You can find it in the Tape & Reel (TR)package. Currently, the output is configured to use Tri-State, Non-Inverted. It is configured with a trigger that uses a value of Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. The JK flip flop operates at 2V~3.6Vvolts. A temperature of -40°C~125°C TAis considered to be the operating temperature. Logic flip flops of this type are classified as D-Type. JK flip flop belongs to the 74LVCseries of FPGAs. You should not exceed 100MHzin the output frequency of the device. The list contains 1 elements. Despite external influences, it consumes 10μAof quiescent current. There have been 20 terminations. It is a member of the 74LVC374 family. The D flip flop is powered by a voltage of 2.7V . A JK flip flop with a 4pFfarad input capacitance is used here. Electronic devices of this type belong to the LVC/LCX/Zfamily. It is mounted by the way of Surface Mount. There are 20pins on it. Its clock edge trigger type is Positive Edge. It is included in FF/Latches. This flip flop is designed with 8 Bits. The maximal supply voltage (Vsup) reaches 3.6V. Normally, the supply voltage (Vsup) should be kept above 2V. In view of its reliability, this D flip flop is a good fit for TR. It runs on 3.3Vvolts of power. This flip flop has a total of 2ports. In addition to its maximum design flexibility, the output current of the T flip flop is 24mA. 8input lines are available for you to choose from.
SN74LVC374AQPWREP Features
Tape & Reel (TR) package
74LVC series
20 pins
8 Bits
3.3V power supplies
SN74LVC374AQPWREP Applications
There are a lot of Texas Instruments SN74LVC374AQPWREP Flip Flops applications.
- Patented noise
- Communications
- Matched Rise and Fall
- Balanced 24 mA output drivers
- Storage registers
- Digital electronics systems
- Asynchronous counter
- Cold spare funcion
- Load Control
- CMOS Process