| Parameters |
| Mount |
Surface Mount |
| Mounting Type |
Surface Mount |
| Package / Case |
5-XFBGA, DSBGA |
| Operating Temperature |
-40°C~85°C TA |
| Packaging |
Tape & Reel (TR) |
| Series |
74LVC |
| JESD-609 Code |
e0 |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
| Number of Terminations |
5 |
| Type |
D-Type |
| Terminal Finish |
Tin/Lead (Sn/Pb) |
| Subcategory |
FF/Latches |
| Packing Method |
TAPE AND REEL |
| Technology |
CMOS |
| Voltage - Supply |
1.65V~5.5V |
| Terminal Position |
BOTTOM |
| Terminal Form |
BALL |
| Peak Reflow Temperature (Cel) |
NOT SPECIFIED |
| Supply Voltage |
1.8V |
| Terminal Pitch |
0.5mm |
| Reach Compliance Code |
not_compliant |
| Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
| Base Part Number |
74LVC1G80 |
| JESD-30 Code |
R-XBGA-B5 |
| Function |
Standard |
| Qualification Status |
Not Qualified |
| Output Type |
Inverted |
| Number of Elements |
1 |
| Polarity |
Inverting |
| Supply Voltage-Max (Vsup) |
5.5V |
| Power Supplies |
3.3V |
| Load Capacitance |
50pF |
| Number of Bits |
1 |
| Clock Frequency |
160MHz |
| Turn On Delay Time |
1.1 ns |
| Family |
LVC/LCX/Z |
| Current - Quiescent (Iq) |
10μA |
| Output Characteristics |
3-STATE |
| Current - Output High, Low |
32mA 32mA |
| Max I(ol) |
0.024 A |
| Max Propagation Delay @ V, Max CL |
4.5ns @ 5V, 50pF |
| Trigger Type |
Positive Edge |
| Input Capacitance |
3.5pF |
| Propagation Delay (tpd) |
9.9 ns |
| Clock Edge Trigger Type |
Positive Edge |
| Height Seated (Max) |
0.5mm |
| Width |
0.9mm |
| RoHS Status |
ROHS3 Compliant |
| Lead Free |
Contains Lead |
SN74LVC1G80YEPR Overview
The item is packaged in 5-XFBGA, DSBGAcases. A package named Tape & Reel (TR)includes it. T flip flop uses Invertedas its output configuration. It is configured with a trigger that uses a value of Positive Edge. This electronic part is mounted in the way of Surface Mount. The JK flip flop operates at 1.65V~5.5Vvolts. A temperature of -40°C~85°C TAis considered to be the operating temperature. This D latch has the type D-Type. FPGAs belonging to the 74LVCseries contain this type of chip. It should not exceed 160MHzin terms of its output frequency. D latch consists of 1 elements. As a result, it consumes 10μA quiescent current and is not affected by external forces. 5terminations have occurred. The 74LVC1G80 family contains it. The power supply voltage is 1.8V. A JK flip flop with a 3.5pFfarad input capacitance is used here. It belongs to the family of electronic devices known as LVC/LCX/Z. There is an electronic component mounted in the way of Surface Mount. This device's clock edge trigger type is Positive Edge. This RS flip flops is a part number FF/Latches. The flip flop is designed with 1bits. As soon as 5.5Vis reached, Vsup reaches its maximum value. Due to its reliability, this T flip flop is well suited for TAPE AND REEL. There are 3.3V power supplies attached to it.
SN74LVC1G80YEPR Features
Tape & Reel (TR) package
74LVC series
1 Bits
3.3V power supplies
SN74LVC1G80YEPR Applications
There are a lot of Texas Instruments SN74LVC1G80YEPR Flip Flops applications.
- Patented noise
- Latch-up performance
- Buffered Clock
- ATE
- Balanced 24 mA output drivers
- Parallel data storage
- Automotive
- Functionally equivalent to the MC10/100EL29
- Convert a momentary switch to a toggle switch
- Digital electronics systems