| Parameters |
| Length |
2mm |
| Width |
1.25mm |
| Thickness |
900μm |
| Radiation Hardening |
No |
| REACH SVHC |
No SVHC |
| RoHS Status |
ROHS3 Compliant |
| Lead Free |
Lead Free |
| Factory Lead Time |
6 Weeks |
| Lifecycle Status |
ACTIVE (Last Updated: 2 days ago) |
| Mount |
Surface Mount |
| Mounting Type |
Surface Mount |
| Package / Case |
5-TSSOP, SC-70-5, SOT-353 |
| Number of Pins |
5 |
| Weight |
2.494758mg |
| Operating Temperature |
-40°C~125°C TA |
| Packaging |
Tape & Reel (TR) |
| Series |
74LVC |
| JESD-609 Code |
e4 |
| Pbfree Code |
yes |
| Part Status |
Active |
| Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
| Number of Terminations |
5 |
| Termination |
SMD/SMT |
| ECCN Code |
EAR99 |
| Type |
D-Type |
| Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory |
FF/Latches |
| Packing Method |
TR |
| Technology |
CMOS |
| Voltage - Supply |
1.65V~5.5V |
| Terminal Position |
DUAL |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
260 |
| Supply Voltage |
1.8V |
| Base Part Number |
74LVC1G80 |
| Function |
Standard |
| Output Type |
Inverted |
| Polarity |
Inverting |
| Power Supplies |
3.3V |
| Number of Circuits |
1 |
| Output Current |
32mA |
| Number of Bits |
1 |
| Clock Frequency |
160MHz |
| Propagation Delay |
4.5 ns |
| Quiescent Current |
10μA |
| Turn On Delay Time |
1.1 ns |
| Family |
LVC/LCX/Z |
| Output Characteristics |
3-STATE |
| Current - Output High, Low |
32mA 32mA |
| Max I(ol) |
0.032 A |
| Max Propagation Delay @ V, Max CL |
4.5ns @ 5V, 50pF |
| Trigger Type |
Positive Edge |
| Input Capacitance |
3.5pF |
| Clock Edge Trigger Type |
Positive Edge |
| Height |
1.1mm |
SN74LVC1G80DCKT Overview
It is packaged in the way of 5-TSSOP, SC-70-5, SOT-353. It is contained within the Tape & Reel (TR)package. T flip flop uses Invertedas the output. It is configured with a trigger that uses a value of Positive Edge. There is an electric part mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of 1.65V~5.5V volts. Temperature is set to -40°C~125°C TA. Logic flip flops of this type are classified as D-Type. In terms of FPGAs, it belongs to the 74LVC series. A frequency of 160MHzshould not be exceeded by its output. It has been determined that there have been 5 terminations. The 74LVC1G80 family contains it. An input voltage of 1.8Vpowers the D latch. The input capacitance of this JK flip flopis 3.5pF farads. It belongs to the family of electronic devices known as LVC/LCX/Z. This electronic part is mounted in the way of Surface Mount. It is designed with 5 pins. The clock edge trigger type for this device is Positive Edge. This RS flip flops is a part number FF/Latches. Flip flops designed with 1bits are used in this part. Using 1 circuits, it is highly flexible. As a result of its reliable performance, this T flip flop is suitable for TR. An electrical current of 3.3V volts is applied to it. In addition to its maximum design flexibility, the output current of the T flip flop is 32mA. This D latch consumes 10μA quiescent current at all.
SN74LVC1G80DCKT Features
Tape & Reel (TR) package
74LVC series
5 pins
1 Bits
3.3V power supplies
SN74LVC1G80DCKT Applications
There are a lot of Texas Instruments SN74LVC1G80DCKT Flip Flops applications.
- Single Down Count-Control Line
- Data storage
- Shift registers
- Safety Clamp
- QML qualified product
- Memory
- Divide a clock signal by 2 or 4
- Common Clocks
- CMOS Process
- Instrumentation