SN74LVC1G80DCKRE4
| Parameters | |
|---|---|
| Factory Lead Time | 6 Weeks |
| Lifecycle Status | ACTIVE (Last Updated: 1 week ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 5-TSSOP, SC-70-5, SOT-353 |
| Number of Pins | 5 |
| Weight | 2.494758mg |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 5 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LVC1G80 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Inverted |
| Polarity | Inverting |
| Power Supplies | 3.3V |
| Number of Circuits | 1 |
| Number of Bits | 1 |
| Clock Frequency | 160MHz |
| Propagation Delay | 5.2 ns |
| Turn On Delay Time | 1.1 ns |
| Family | LVC/LCX/Z |
| Current - Quiescent (Iq) | 10μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 32mA 32mA |
| Max I(ol) | 0.032 A |
| Max Propagation Delay @ V, Max CL | 4.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| Clock Edge Trigger Type | Positive Edge |
| Height | 1.1mm |
| Length | 2mm |
| Width | 1.25mm |
| Thickness | 900μm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LVC1G80DCKRE4 Overview
The flip flop is packaged in 5-TSSOP, SC-70-5, SOT-353. There is an embedded version in the package Tape & Reel (TR). T flip flop uses Invertedas its output configuration. There is a trigger configured with Positive Edge. Surface Mountis occupied by this electronic component. The supply voltage is set to 1.65V~5.5V. Temperature is set to -40°C~125°C TA. The type of this D latch is D-Type. JK flip flop is a part of the 74LVCseries of FPGAs. It should not exceed 160MHzin terms of its output frequency. This process consumes 10μA quiescents. A total of 5terminations have been recorded. The 74LVC1G80 family contains this object. It is powered by a voltage of 1.8V . Input capacitance of this device is 3.5pF farads. LVC/LCX/Zis the family of this D flip flop. Electronic part Surface Mountis mounted in the way. Basically, it is designed with a set of 5 pins. A Positive Edgeclock edge trigger is used in this device. The part you are looking for is included in FF/Latches. This flip flop is designed with 1 Bits. The superior flexibility of this circuit is achieved by using 1 circuits. As a result of its reliable performance, this T flip flop is suitable for TR. The system runs on a power supply of 3.3V watts.
SN74LVC1G80DCKRE4 Features
Tape & Reel (TR) package
74LVC series
5 pins
1 Bits
3.3V power supplies
SN74LVC1G80DCKRE4 Applications
There are a lot of Texas Instruments SN74LVC1G80DCKRE4 Flip Flops applications.
- EMI reduction circuitry
- Frequency Dividers
- Single Down Count-Control Line
- Communications
- Automotive
- Frequency division
- Synchronous counter
- ESD protection
- Data storage
- Shift Registers