SN74LVC1G79YEAR
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 5-XFBGA, DSBGA |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVC |
| JESD-609 Code | e0 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 5 |
| Type | D-Type |
| Terminal Finish | TIN LEAD |
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| JESD-30 Code | R-PBGA-B5 |
| Function | Standard |
| Qualification Status | COMMERCIAL |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Number of Bits | 1 |
| Clock Frequency | 160MHz |
| Family | LVC/LCX/Z |
| Current - Quiescent (Iq) | 10μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 32mA 32mA |
| Output Polarity | TRUE |
| Max Propagation Delay @ V, Max CL | 4.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Propagation Delay (tpd) | 9.9 ns |
| Height Seated (Max) | 0.5mm |
| Width | 0.9mm |
| RoHS Status | Non-RoHS Compliant |
SN74LVC1G79YEAR Overview
The package is in the form of 5-XFBGA, DSBGA. The package Tape & Reel (TR)contains it. T flip flop uses Non-Invertedas the output. This trigger uses the value Positive Edge. There is an electronic component mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 1.65V~5.5V. In the operating environment, the temperature is -40°C~85°C TA. This logic flip flop is classified as type D-Type. This type of FPGA is a part of the 74LVC series. This D flip flop should not have a frequency greater than 160MHz. A total of 1 elements are present. There is 10μA quiescent consumption. In 5terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. A voltage of 1.8V is used to power it. There is 4pF input capacitance for this T flip flop. It is a member of the LVC/LCX/Zfamily of D flip flop. It is designed with a number of bits of 1. The maximal supply voltage (Vsup) reaches 5.5V.
SN74LVC1G79YEAR Features
Tape & Reel (TR) package
74LVC series
1 Bits
SN74LVC1G79YEAR Applications
There are a lot of Rochester Electronics, LLC SN74LVC1G79YEAR Flip Flops applications.
- Latch
- Load Control
- Balanced 24 mA output drivers
- Buffered Clock
- Power down protection
- Automotive
- CMOS Process
- Common Clocks
- Computing
- Patented noise