| Parameters |
| Factory Lead Time |
6 Weeks |
| Lifecycle Status |
ACTIVE (Last Updated: 4 days ago) |
| Contact Plating |
Gold |
| Mount |
Surface Mount |
| Mounting Type |
Surface Mount |
| Package / Case |
20-SSOP (0.209, 5.30mm Width) |
| Number of Pins |
20 |
| Weight |
156.687814mg |
| Operating Temperature |
-40°C~85°C TA |
| Packaging |
Tape & Reel (TR) |
| Series |
74LV |
| JESD-609 Code |
e4 |
| Pbfree Code |
yes |
| Part Status |
Active |
| Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
| Number of Terminations |
20 |
| ECCN Code |
EAR99 |
| Type |
D-Type |
| Subcategory |
FF/Latches |
| Packing Method |
TR |
| Technology |
CMOS |
| Voltage - Supply |
2V~5.5V |
| Terminal Position |
DUAL |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
260 |
| Supply Voltage |
2.5V |
| Terminal Pitch |
0.65mm |
| Base Part Number |
74LV574 |
| Function |
Standard |
| Output Type |
Tri-State, Non-Inverted |
| Number of Elements |
1 |
| Polarity |
Non-Inverting |
| Supply Voltage-Max (Vsup) |
5.5V |
| Supply Voltage-Min (Vsup) |
2V |
| Number of Circuits |
8 |
| Load Capacitance |
50pF |
| Number of Ports |
2 |
| Output Current |
16mA |
| Number of Bits |
8 |
| Clock Frequency |
175MHz |
| Propagation Delay |
10.6 ns |
| Quiescent Current |
20μA |
| Turn On Delay Time |
4.8 ns |
| Family |
LV/LV-A/LVX/H |
| Logic Function |
D-Type, Flip-Flop |
| Current - Output High, Low |
16mA 16mA |
| Max Propagation Delay @ V, Max CL |
10.6ns @ 5V, 50pF |
| Trigger Type |
Positive Edge |
| Input Capacitance |
1.8pF |
| Power Supply Current-Max (ICC) |
0.02mA |
| Number of Input Lines |
3 |
| Count Direction |
UNIDIRECTIONAL |
| Clock Edge Trigger Type |
Positive Edge |
| Translation |
N/A |
| Max Frequency@Nom-Sup |
45000000Hz |
| Height |
2mm |
| Length |
7.2mm |
| Width |
5.3mm |
| Thickness |
1.95mm |
| Radiation Hardening |
No |
| RoHS Status |
ROHS3 Compliant |
| Lead Free |
Lead Free |
SN74LV574ADBR Overview
It is embeded in 20-SSOP (0.209, 5.30mm Width) case. It is contained within the Tape & Reel (TR)package. T flip flop uses Tri-State, Non-Invertedas its output configuration. The trigger it is configured with uses Positive Edge. This electronic part is mounted in the way of Surface Mount. With a supply voltage of 2V~5.5V volts, it operates. Temperature is set to -40°C~85°C TA. Logic flip flops of this type are classified as D-Type. This type of FPGA is a part of the 74LV series. Its output frequency should not exceed 175MHz Hz. The list contains 1 elements. There have been 20 terminations. You can search similar parts based on 74LV574. Power is supplied from a voltage of 2.5V volts. The input capacitance of this JK flip flopis 1.8pF farads. Electronic devices of this type belong to the LV/LV-A/LVX/Hfamily. Electronic part Surface Mountis mounted in the way. 20pins are included in its design. This device exhibits a clock edge trigger type of Positive Edge. There is a FF/Latchesbase part number assigned to the RS flip flops. This flip flop is designed with 8 Bits. In this case, the maximum supply voltage (Vsup) reaches 5.5V. Keeping the supply voltage (Vsup) above 2V is necessary for normal operation. To achieve this superior flexibility, 8 circuits are used. As a result of its reliability, this D flip flop is ideally suited for TR. This flip flop has a total of 2ports. In addition to its maximum design flexibility, the output current of the T flip flop is 16mA. Currently, there are 3 lines of input. It consumes 20μA of quiescent current without being affected by external factors.
SN74LV574ADBR Features
Tape & Reel (TR) package
74LV series
20 pins
8 Bits
SN74LV574ADBR Applications
There are a lot of Texas Instruments SN74LV574ADBR Flip Flops applications.
- Instrumentation
- Supports Live Insertion
- Event Detectors
- Single Up Count-Control Line
- Synchronous counter
- Differential Individual
- Count Modes
- Buffered Clock
- Computing
- Frequency Divider circuits