| Parameters |
| Factory Lead Time |
6 Weeks |
| Lifecycle Status |
ACTIVE (Last Updated: 3 days ago) |
| Contact Plating |
Gold |
| Mount |
Surface Mount |
| Mounting Type |
Surface Mount |
| Package / Case |
20-SSOP (0.209, 5.30mm Width) |
| Number of Pins |
20 |
| Weight |
156.687814mg |
| Operating Temperature |
-40°C~85°C |
| Packaging |
Cut Tape (CT) |
| Series |
74LV |
| JESD-609 Code |
e4 |
| Pbfree Code |
yes |
| Part Status |
Active |
| Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
| Number of Terminations |
20 |
| ECCN Code |
EAR99 |
| Subcategory |
FF/Latches |
| Packing Method |
TR |
| Technology |
CMOS |
| Voltage - Supply |
2V~5.5V |
| Terminal Position |
DUAL |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
260 |
| Number of Functions |
1 |
| Supply Voltage |
2.5V |
| Terminal Pitch |
0.65mm |
| Base Part Number |
74LV573 |
| Pin Count |
20 |
| Output Type |
Tri-State |
| Circuit |
8:8 |
| Polarity |
Non-Inverting |
| Supply Voltage-Max (Vsup) |
5.5V |
| Power Supplies |
3.3V |
| Supply Voltage-Min (Vsup) |
2V |
| Load Capacitance |
50pF |
| Number of Ports |
2 |
| Output Current |
16mA |
| Number of Bits |
8 |
| Propagation Delay |
8.8 ns |
| Quiescent Current |
20μA |
| Turn On Delay Time |
1 ns |
| Family |
LV/LV-A/LVX/H |
| Logic Function |
D-Type, Latch |
| Output Characteristics |
3-STATE |
| Current - Output High, Low |
16mA 16mA |
| Logic Type |
D-Type Transparent Latch |
| Control Type |
ENABLE LOW |
| Number of Input Lines |
2 |
| Independent Circuits |
1 |
| Count Direction |
UNIDIRECTIONAL |
| Height |
2mm |
| Length |
7.2mm |
| Width |
5.3mm |
| Thickness |
1.95mm |
| Radiation Hardening |
No |
| RoHS Status |
ROHS3 Compliant |
| Lead Free |
Lead Free |
SN74LV573ADBR Overview
In the package 20-SSOP (0.209, 5.30mm Width), it can be found. This package has the format of Cut Tape (CT). In its configuration, Tri-State is used as the output. This electrical device has a logic type of D-Type Transparent Latch. A Surface Mount mount is used for mounting this electronic part. A 2V~5.5V voltage supply is required for operation. During operation, the temperature is set at -40°C~85°C. 74LV is the series number of this FPGA. The design of this electronic part is based on 8 bits. This device is designed with 20 terminations. As a member of the 74LV573 family, it falls under that category. It operates with a supply voltage of 2.5V. It has 20 pins that makes it easy to use. It is part of the family of electronic devices called LV/LV-A/LVX/H. There are 20 pins on it. Mounting this electronic component follows the Surface Mount method. This device has 2 ports that can be connected to it. Subcategory FF/Latches includes this part. The maximal supply voltage (Vsup) reaches 5.5V. There is 3.3V power supply for it. A voltage greater than 2V must be supplied as a power supply (Vsup). There are electronic circuits attached to the 2 input lines. The device's reliable performance makes it a good choice for TR. The 16mA output current gives it maximum design flexibility. It consumes 20μA of quiescent current without being affected by outside factors.
SN74LV573ADBR Features
20-SSOP (0.209, 5.30mm Width) package
74LV series
8 Bits
74LV573 family
20 pin count
20 pins
3.3V power supplies
SN74LV573ADBR Applications
There are a lot of Texas Instruments SN74LV573ADBR Latches applications.
- Shift Registers
- Motor Drives
- PCs and Notebooks
- Timers
- Relay
- Shift right with parallel loading
- Parallel data storage
- Display
- Audio and video switching
- Parallel Input