SN74LS273DW
| Parameters | |
|---|---|
| Factory Lead Time | 6 Weeks |
| Lifecycle Status | ACTIVE (Last Updated: 5 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Number of Pins | 20 |
| Weight | 500.709277mg |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tube |
| Series | 74LS |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Technology | TTL |
| Voltage - Supply | 4.75V~5.25V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Base Part Number | 74LS273 |
| Function | Master Reset |
| Output Type | Non-Inverted |
| Operating Supply Voltage | 5V |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Power Supplies | 5V |
| Number of Channels | 8 |
| Output Current | 8mA |
| Number of Bits | 8 |
| Clock Frequency | 40MHz |
| Propagation Delay | 27 ns |
| Turn On Delay Time | 17 ns |
| Family | LS |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 27mA |
| Current - Output High, Low | 400μA 8mA |
| Max Propagation Delay @ V, Max CL | 27ns @ 5V, 15pF |
| Trigger Type | Positive Edge |
| Number of Input Lines | 2 |
| fmax-Min | 30 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 30000000Hz |
| Height | 2.65mm |
| Length | 12.8mm |
| Width | 7.5mm |
| Thickness | 2.35mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Contains Lead |
SN74LS273DW Overview
The package is in the form of 20-SOIC (0.295, 7.50mm Width). The Tubepackage contains it. As configured, the output uses Non-Inverted. It is configured with a trigger that uses a value of Positive Edge. Surface Mountis occupied by this electronic component. The JK flip flop operates at 4.75V~5.25Vvolts. In the operating environment, the temperature is 0°C~70°C TA. It is an electronic flip flop with the type D-Type. JK flip flop belongs to the 74LSseries of FPGAs. Its output frequency should not exceed 40MHz. A total of 1elements are present in it. As a result, it consumes 27mA of quiescent current without being affected by external factors. A total of 20 terminations have been made. It is a member of the 74LS273 family. An input voltage of 5Vpowers the D latch. This D flip flop belongs to the family of LS. Surface Mount mounts this electronic component. This board has 20 pins. This device has the clock edge trigger type of Positive Edge. This device has the base part number FF/Latches. It is designed with 8bits. The D latch operates on 5V volts. In order to ensure high efficiency, the supply voltage should remain at 5V. Its output current of 8mAallows for maximum design flexibility. Currently, there are 2 input lines present. A total of 8 channels are available.
SN74LS273DW Features
Tube package
74LS series
20 pins
8 Bits
5V power supplies
SN74LS273DW Applications
There are a lot of Texas Instruments SN74LS273DW Flip Flops applications.
- Convert a momentary switch to a toggle switch
- Buffered Clock
- Latch
- ESCC
- Bounce elimination switch
- Dynamic threshold performance
- Asynchronous counter
- Modulo – n – counter
- Circuit Design
- Count Modes