SN74AUP1G80DCKTG4
| Parameters | |
|---|---|
| Factory Lead Time | 6 Weeks |
| Lifecycle Status | ACTIVE (Last Updated: 1 week ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 5-TSSOP, SC-70-5, SOT-353 |
| Number of Pins | 5 |
| Weight | 2.494758mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74AUP |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 5 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 0.8V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.2V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74AUP1G80 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Inverted |
| Polarity | Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Supply Voltage-Min (Vsup) | 0.8V |
| Number of Circuits | 1 |
| Load Capacitance | 30pF |
| Number of Bits | 1 |
| Clock Frequency | 260MHz |
| Propagation Delay | 20.7 ns |
| Turn On Delay Time | 3.1 ns |
| Family | AUP/ULP/V |
| Current - Quiescent (Iq) | 0.9μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 4mA 4mA |
| Max I(ol) | 0.004 A |
| Max Propagation Delay @ V, Max CL | 6.4ns @ 3.3V, 30pF |
| Prop. Delay@Nom-Sup | 28.7 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 1.5pF |
| Power Supply Current-Max (ICC) | 0.0009mA |
| fmax-Min | 260 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 260000000Hz |
| Height | 1.1mm |
| Length | 2mm |
| Width | 1.25mm |
| Thickness | 900μm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74AUP1G80DCKTG4 Overview
The flip flop is packaged in 5-TSSOP, SC-70-5, SOT-353. Package Tape & Reel (TR)embeds it. T flip flop is configured with an output of Inverted. Positive Edgeis the trigger it is configured with. There is an electric part mounted in the way of Surface Mount. The JK flip flop operates at 0.8V~3.6Vvolts. The operating temperature is -40°C~85°C TA. There is D-Type type of electronic flip flop associated with this device. The FPGA belongs to the 74AUP series. A frequency of 260MHzshould be the maximum output frequency. There is 0.9μA quiescent consumption. The number of terminations is 5. JK flip flop belongs to 74AUP1G80 family. A voltage of 1.2V is used as the power supply for this D latch. A 1.5pFfarad input capacitance is provided by this T flip flop. An electronic device belonging to the family AUP/ULP/Vcan be found here. Surface Mount mounts this electronic component. With its 5pins, it is designed to work with most electronic flip flops. A Positive Edgeclock edge trigger is used in this device. This part is included in FF/Latches. It is designed with 1bits. As soon as Vsup reaches 3.6V, the maximum supply voltage is reached. A normal operating voltage (Vsup) should remain above 0.8V. Due to its superior flexibility, it uses 1 circuits. In view of its reliability, this D flip flop is a good fit for TR.
SN74AUP1G80DCKTG4 Features
Tape & Reel (TR) package
74AUP series
5 pins
1 Bits
SN74AUP1G80DCKTG4 Applications
There are a lot of Texas Instruments SN74AUP1G80DCKTG4 Flip Flops applications.
- Set-reset capability
- QML qualified product
- Common Clocks
- Circuit Design
- Power down protection
- Communications
- Count Modes
- Dynamic threshold performance
- Registers
- ESCC