SN74AUC2G80DCTRG4
| Parameters | |
|---|---|
| Factory Lead Time | 6 Weeks |
| Lifecycle Status | ACTIVE (Last Updated: 4 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-LSSOP, 8-MSOP (0.110, 2.80mm Width) |
| Number of Pins | 8 |
| Weight | 23.388357mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74AUC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 0.8V~2.7V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.2V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74AUC2G80 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Inverted |
| Polarity | Inverting |
| Number of Circuits | 2 |
| Load Capacitance | 30pF |
| Clock Frequency | 275MHz |
| Propagation Delay | 2.4 ns |
| Turn On Delay Time | 5 ns |
| Family | AUC |
| Current - Quiescent (Iq) | 10μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 9mA 9mA |
| Max I(ol) | 0.009 A |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 1.8ns @ 2.5V, 30pF |
| Prop. Delay@Nom-Sup | 3.9 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 2.5pF |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Positive Edge |
| Height | 1.3mm |
| Length | 2.95mm |
| Width | 2.8mm |
| Thickness | 1.29mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74AUC2G80DCTRG4 Overview
The flip flop is packaged in 8-LSSOP, 8-MSOP (0.110, 2.80mm Width). Package Tape & Reel (TR)embeds it. The output it is configured with uses Inverted. It is configured with a trigger that uses Positive Edge. There is an electronic component mounted in the way of Surface Mount. The supply voltage is set to 0.8V~2.7V. Currently, the operating temperature is -40°C~85°C TA. The type of this D latch is D-Type. In FPGA terms, D flip flop is a type of 74AUCseries FPGA. You should not exceed 275MHzin its output frequency. It consumes 10μA of quiescent current without being affected by external factors. 8terminations have occurred. JK flip flop belongs to 74AUC2G80 family. Power is supplied from a voltage of 1.2V volts. There is 2.5pF input capacitance for this T flip flop. It is a member of the AUCfamily of D flip flop. Surface Mount mounts this electronic component. 8pins are included in its design. It has a clock edge trigger type of Positive Edge. Its superior flexibility is attributed to its use of 2 circuits. Considering the reliability of this T flip flop, it is well suited for TR. It has 1 output lines to operate.
SN74AUC2G80DCTRG4 Features
Tape & Reel (TR) package
74AUC series
8 pins
SN74AUC2G80DCTRG4 Applications
There are a lot of Texas Instruments SN74AUC2G80DCTRG4 Flip Flops applications.
- Computing
- Registers
- Supports Live Insertion
- Data storage
- Differential Individual
- Load Control
- Data Synchronizers
- Individual Asynchronous Resets
- ESCC
- Bus hold