SN74AUC1G80YEPR
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 5-XFBGA, DSBGA |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74AUC |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 5 |
| Type | D-Type |
| Terminal Finish | TIN LEAD |
| Technology | CMOS |
| Voltage - Supply | 0.8V~2.7V |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.2V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| JESD-30 Code | R-XBGA-B5 |
| Function | Standard |
| Qualification Status | COMMERCIAL |
| Output Type | Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 2.7V |
| Supply Voltage-Min (Vsup) | 0.8V |
| Number of Bits | 1 |
| Clock Frequency | 275MHz |
| Family | AUC |
| Current - Quiescent (Iq) | 10μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 9mA 9mA |
| Max Propagation Delay @ V, Max CL | 1.8ns @ 2.5V, 30pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 2.5pF |
| Propagation Delay (tpd) | 3.9 ns |
| fmax-Min | 275 MHz |
| Height Seated (Max) | 0.5mm |
| Width | 0.9mm |
| RoHS Status | Non-RoHS Compliant |
SN74AUC1G80YEPR Overview
The item is packaged in 5-XFBGA, DSBGAcases. It is included in the package Tape & Reel (TR). This output is configured with Inverted. In the configuration of the trigger, Positive Edgeis used. There is an electronic component mounted in the way of Surface Mount. A voltage of 0.8V~2.7Vis used as the supply voltage. In the operating environment, the temperature is -40°C~85°C TA. It is an electronic flip flop with the type D-Type. JK flip flop is a part of the 74AUCseries of FPGAs. A frequency of 275MHzshould not be exceeded by its output. There are 1 elements in it. It consumes 10μA of quiescent current without being affected by external factors. Terminations are 5. It is powered from a supply voltage of 1.2V. Input capacitance of this device is 2.5pF farads. AUCis the family of this D flip flop. There are 1bits in this flip flop. Vsup reaches its maximum value at 2.7V. A normal operating voltage (Vsup) should remain above 0.8V.
SN74AUC1G80YEPR Features
Tape & Reel (TR) package
74AUC series
1 Bits
SN74AUC1G80YEPR Applications
There are a lot of Rochester Electronics, LLC SN74AUC1G80YEPR Flip Flops applications.
- Balanced Propagation Delays
- Buffer registers
- High Performance Logic for test systems
- Data transfer
- Counters
- Shift Registers
- Memory
- Frequency Dividers
- Differential Individual
- Instrumentation