| Parameters |
| JESD-609 Code |
e4 |
| Pbfree Code |
yes |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
| Number of Terminations |
24 |
| Type |
D-Type |
| Terminal Finish |
NICKEL PALLADIUM GOLD |
| Additional Feature |
WITH CLEAR AND CLOCK ENABLE |
| Technology |
TTL |
| Voltage - Supply |
4.5V~5.5V |
| Terminal Position |
DUAL |
| Peak Reflow Temperature (Cel) |
NOT SPECIFIED |
| Supply Voltage |
5V |
| Terminal Pitch |
2.54mm |
| Reach Compliance Code |
unknown |
| Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
| JESD-30 Code |
R-PDIP-T24 |
| Function |
Master Reset |
| Output Type |
Tri-State, Non-Inverted |
| Number of Elements |
1 |
| Supply Voltage-Max (Vsup) |
5.5V |
| Supply Voltage-Min (Vsup) |
4.5V |
| Number of Ports |
2 |
| Family |
AS |
| Current - Quiescent (Iq) |
80mA |
| Output Characteristics |
3-STATE |
| Current - Output High, Low |
24mA 48mA |
| Output Polarity |
TRUE |
| Number of Bits per Element |
9 |
| Max Propagation Delay @ V, Max CL |
13ns @ 5V, 50pF |
| Trigger Type |
Positive Edge |
| Height Seated (Max) |
5.08mm |
| Width |
7.62mm |
| RoHS Status |
ROHS3 Compliant |
| Mounting Type |
Through Hole |
| Package / Case |
24-DIP (0.300, 7.62mm) |
| Surface Mount |
NO |
| Operating Temperature |
0°C~70°C TA |
| Packaging |
Tube |
| Series |
74AS |
SN74AS823ANT Overview
As a result, it is packaged as 24-DIP (0.300, 7.62mm). There is an embedded version in the package Tube. It is configured with Tri-State, Non-Invertedas an output. Positive Edgeis the trigger it is configured with. There is an electronic component mounted in the way of Through Hole. Powered by a 4.5V~5.5Vvolt supply, it operates as follows. It is operating at 0°C~70°C TA. This electronic flip flop is of type D-Type. JK flip flop belongs to the 74ASseries of FPGAs. A total of 1 elements are present. There is a consumption of 80mAof quiescent energy. There are 24 terminations,Power is provided by a 5V supply. Devices in the ASfamily are electronic devices. There is a 5.5Vmaximum supply voltage (Vsup). Keeping the supply voltage (Vsup) above 4.5V is necessary for normal operation. The flip flop contains 2ports. There is also a characteristic of WITH CLEAR AND CLOCK ENABLE.
SN74AS823ANT Features
Tube package
74AS series
SN74AS823ANT Applications
There are a lot of Rochester Electronics, LLC SN74AS823ANT Flip Flops applications.
- Counters
- Latch-up performance
- 2 – Bit synchronous counter
- Set-reset capability
- Shift registers
- Supports Live Insertion
- Cold spare funcion
- Individual Asynchronous Resets
- Computers
- Guaranteed simultaneous switching noise level