SN74ALVCH16823DLR
| Parameters | |
|---|---|
| Factory Lead Time | 6 Weeks |
| Lifecycle Status | ACTIVE (Last Updated: 1 day ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 56-BSSOP (0.295, 7.50mm Width) |
| Number of Pins | 56 |
| Weight | 694.790113mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74ALVCH |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 56 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Additional Feature | WITH CLEAR AND CLOCK ENABLE |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.635mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74ALVCH16823 |
| Function | Master Reset |
| Qualification Status | Not Qualified |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 2 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 1.65V |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 24mA |
| Number of Bits | 18 |
| Clock Frequency | 150MHz |
| Propagation Delay | 3.5 ns |
| Turn On Delay Time | 1 ns |
| Family | ALVC/VCX/A |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 40μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 24mA 24mA |
| Max Propagation Delay @ V, Max CL | 4.5ns @ 3.3V, 30pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| Power Supply Current-Max (ICC) | 0.04mA |
| Number of Output Lines | 9 |
| Count Direction | UNIDIRECTIONAL |
| Clock Edge Trigger Type | Positive Edge |
| Translation | N/A |
| Max Frequency@Nom-Sup | 150000000Hz |
| Height | 2.79mm |
| Length | 18.41mm |
| Width | 7.49mm |
| Thickness | 2.59mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74ALVCH16823DLR Overview
The item is packaged in 56-BSSOP (0.295, 7.50mm Width)cases. There is an embedded version in the package Cut Tape (CT). T flip flop uses Tri-State, Non-Invertedas the output. It is configured with the trigger Positive Edge. Surface Mountis in the way of this electric part. The JK flip flop operates at a voltage of 1.65V~3.6V. A temperature of -40°C~85°C TAis considered to be the operating temperature. The type of this D latch is D-Type. The FPGA belongs to the 74ALVCH series. It should not exceed 150MHzin its output frequency. A total of 2 elements are present. There is 40μA quiescent consumption. Currently, there are 56 terminations. D latch belongs to the 74ALVCH16823 family. It is powered by a voltage of 1.8V . This JK flip flop has a 4.5pFfarad input capacitance. Electronic devices of this type belong to the ALVC/VCX/Afamily. There is an electronic part that is mounted in the way of Surface Mount. The electronic flip flop is designed with pins 56. This device has Positive Edgeas its clock edge trigger type. This device is part of the FF/Latchesbase part number family. It is designed with a number of bits of 18. As soon as 3.6Vis reached, Vsup reaches its maximum value. It is imperative that the supply voltage (Vsup) is maintained above 1.65Vin order to ensure normal operation. Compared to other similar T flip flops, this device offers reliable performance and is well suited for TR. A power supply of 3.3Vis required to operate it. There are 2 ports embedded in the flip flops. It offers maximum design flexibility with its output current of 24mA. There are 9 output lines on it. In addition, you can refer to the additinal WITH CLEAR AND CLOCK ENABLE of the D latch.
SN74ALVCH16823DLR Features
Cut Tape (CT) package
74ALVCH series
56 pins
18 Bits
3.3V power supplies
SN74ALVCH16823DLR Applications
There are a lot of Texas Instruments SN74ALVCH16823DLR Flip Flops applications.
- Memory
- Asynchronous counter
- Bus hold
- Functionally equivalent to the MC10/100EL29
- QML qualified product
- Count Modes
- Dynamic threshold performance
- Clock pulse
- Balanced Propagation Delays
- Pattern generators