| Parameters |
| Width |
7.5mm |
| Thickness |
2.35mm |
| Radiation Hardening |
No |
| REACH SVHC |
No SVHC |
| RoHS Status |
ROHS3 Compliant |
| Lead Free |
Lead Free |
| Factory Lead Time |
6 Weeks |
| Lifecycle Status |
ACTIVE (Last Updated: 3 days ago) |
| Mount |
Surface Mount |
| Mounting Type |
Surface Mount |
| Package / Case |
20-SOIC (0.295, 7.50mm Width) |
| Number of Pins |
20 |
| Weight |
500.709277mg |
| Operating Temperature |
-40°C~85°C TA |
| Packaging |
Tape & Reel (TR) |
| Series |
74ACT |
| JESD-609 Code |
e4 |
| Pbfree Code |
yes |
| Part Status |
Active |
| Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
| Number of Terminations |
20 |
| ECCN Code |
EAR99 |
| Type |
D-Type |
| Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory |
FF/Latches |
| Packing Method |
TR |
| Technology |
CMOS |
| Voltage - Supply |
4.5V~5.5V |
| Terminal Position |
DUAL |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
260 |
| Supply Voltage |
5V |
| Base Part Number |
74ACT574 |
| Function |
Standard |
| Output Type |
Tri-State, Non-Inverted |
| Operating Supply Voltage |
5V |
| Number of Elements |
1 |
| Polarity |
Non-Inverting |
| Power Supplies |
5V |
| Number of Circuits |
8 |
| Load Capacitance |
50pF |
| Number of Ports |
2 |
| Output Current |
50mA |
| Number of Bits |
8 |
| Clock Frequency |
110MHz |
| Propagation Delay |
12 ns |
| Turn On Delay Time |
7 ns |
| Family |
ACT |
| Logic Function |
D-Type, Flip-Flop |
| Current - Quiescent (Iq) |
4μA |
| Current - Output High, Low |
24mA 24mA |
| Max I(ol) |
0.024 A |
| Max Propagation Delay @ V, Max CL |
11ns @ 5V, 50pF |
| Trigger Type |
Positive Edge |
| Input Capacitance |
4.5pF |
| Power Supply Current-Max (ICC) |
0.04mA |
| Number of Input Lines |
3 |
| Count Direction |
UNIDIRECTIONAL |
| Clock Edge Trigger Type |
Positive Edge |
| Translation |
N/A |
| Height |
2.65mm |
| Length |
12.8mm |
SN74ACT574DWR Overview
It is embeded in 20-SOIC (0.295, 7.50mm Width) case. There is an embedded version in the package Tape & Reel (TR). T flip flop is configured with an output of Tri-State, Non-Inverted. JK flip flop uses Positive Edgeas the trigger. The electronic part is mounted in the way of Surface Mount. A 4.5V~5.5Vsupply voltage is required for it to operate. In this case, the operating temperature is -40°C~85°C TA. The type of this D latch is D-Type. The FPGA belongs to the 74ACT series. This D flip flop should not have a frequency greater than 110MHz. A total of 1elements are present in it. It consumes 4μA of quiescent 20terminations have occurred. It is a member of the 74ACT574 family. An input voltage of 5Vpowers the D latch. Its input capacitance is 4.5pF farads. A device of this type belongs to the family of ACT. The electronic part is mounted in the way of Surface Mount. 20pins are included in its design. This device exhibits a clock edge trigger type of Positive Edge. The part is included in FF/Latches. Flip flops designed with 8bits are used in this part. To achieve this superior flexibility, 8 circuits are used. As a result of its reliability, this D flip flop is ideally suited for TR. The D latch operates on 5V volts. The D flip flop has no ports embedded. A high level of efficiency can be achieved by maintaining the supply voltage at 5V. In addition to its maximum design flexibility, the output current of the T flip flop is 50mA. It is reported that there are 3 input lines.
SN74ACT574DWR Features
Tape & Reel (TR) package
74ACT series
20 pins
8 Bits
5V power supplies
SN74ACT574DWR Applications
There are a lot of Texas Instruments SN74ACT574DWR Flip Flops applications.
- Buffered Clock
- Single Up Count-Control Line
- ATE
- Frequency Dividers
- Balanced 24 mA output drivers
- Data storage
- Power down protection
- Common Clocks
- Data transfer
- ESCC