SN74ACT564DW
| Parameters | |
|---|---|
| Packaging | Tube |
| Series | 74ACT |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Base Part Number | 74ACT564 |
| Function | Standard |
| Output Type | Tri-State, Inverted |
| Operating Supply Voltage | 5V |
| Number of Elements | 1 |
| Polarity | Inverting |
| Power Supplies | 5V |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 24mA |
| Number of Bits | 8 |
| Clock Frequency | 90MHz |
| Propagation Delay | 10.5 ns |
| Turn On Delay Time | 6.5 ns |
| Family | ACT |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 4μA |
| Current - Output High, Low | 24mA 24mA |
| Max I(ol) | 0.024 A |
| Max Propagation Delay @ V, Max CL | 10.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| Power Supply Current-Max (ICC) | 0.04mA |
| Number of Input Lines | 3 |
| Count Direction | UNIDIRECTIONAL |
| Clock Edge Trigger Type | Positive Edge |
| Translation | N/A |
| Height | 2.65mm |
| Length | 12.8mm |
| Width | 7.5mm |
| Thickness | 2.35mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
| Factory Lead Time | 6 Weeks |
| Lifecycle Status | ACTIVE (Last Updated: 1 day ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Number of Pins | 20 |
| Weight | 500.709277mg |
| Operating Temperature | -40°C~85°C TA |
SN74ACT564DW Overview
20-SOIC (0.295, 7.50mm Width)is the way it is packaged. The package Tubecontains it. The output it is configured with uses Tri-State, Inverted. It is configured with a trigger that uses a value of Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. A voltage of 4.5V~5.5Vis required for its operation. Temperature is set to -40°C~85°C TA. The type of this D latch is D-Type. The 74ACTseries comprises this type of FPGA. In order for it to function properly, its output frequency should not exceed 90MHz. The list contains 1 elements. As a result, it consumes 4μA of quiescent current without being affected by external factors. Currently, there are 20 terminations. The 74ACT564 family contains it. A voltage of 5V provides power to the D latch. A JK flip flop with a 4.5pFfarad input capacitance is used here. In this case, the D flip flop belongs to the ACTfamily. This electronic part is mounted in the way of Surface Mount. As you can see from the design, it has pins with 20. This device's clock edge trigger type is Positive Edge. This device is part of the FF/Latchesbase part number family. The flip flop is designed with 8bits. In order to achieve its superior flexibility, 8 circuits are used. A total of 5V power supplies are needed to run it. This D flip flop is equipped with 0 ports. Optimal efficiency requires a supply voltage of 5V. With an output current of 24mA, this device offers maximum design flexibility. Currently, there are 3 lines of input.
SN74ACT564DW Features
Tube package
74ACT series
20 pins
8 Bits
5V power supplies
SN74ACT564DW Applications
There are a lot of Texas Instruments SN74ACT564DW Flip Flops applications.
- Automotive
- Circuit Design
- Buffered Clock
- Bus hold
- CMOS Process
- Latch-up performance
- High Performance Logic for test systems
- Dynamic threshold performance
- QML qualified product
- Communications