Parameters |
Factory Lead Time |
6 Weeks |
Lifecycle Status |
ACTIVE (Last Updated: 1 week ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
14-SOIC (0.154, 3.90mm Width) |
Number of Pins |
14 |
Weight |
122.413241mg |
Operating Temperature |
-55°C~125°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74AC |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
14 |
ECCN Code |
EAR99 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
TR |
Technology |
CMOS |
Voltage - Supply |
2V~6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
3.3V |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74AC74 |
Function |
Set(Preset) and Reset |
Qualification Status |
Not Qualified |
Output Type |
Differential |
Operating Supply Voltage |
5V |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
6V |
Supply Voltage-Min (Vsup) |
2V |
Number of Channels |
2 |
Load Capacitance |
50pF |
Output Current |
24mA |
Clock Frequency |
160MHz |
Propagation Delay |
14 ns |
Quiescent Current |
2μA |
Turn On Delay Time |
6 ns |
Family |
AC |
Logic Function |
AND, D-Type |
Current - Output High, Low |
24mA 24mA |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
10ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
3pF |
Power Supply Current-Max (ICC) |
0.04mA |
Number of Output Lines |
1 |
fmax-Min |
95 MHz |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
70000000Hz |
Height |
1.75mm |
Length |
8.65mm |
Width |
3.91mm |
Thickness |
1.58mm |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
SN74AC74MDREP Overview
14-SOIC (0.154, 3.90mm Width)is the packaging method. D flip flop is embedded in the Tape & Reel (TR) package. In the configuration, Differentialis used as the output. This trigger is configured to use Positive Edge. It is mounted in the way of Surface Mount. A voltage of 2V~6Vis required for its operation. Currently, the operating temperature is -55°C~125°C TA. Logic flip flops of this type are classified as D-Type. In FPGA terms, D flip flop is a type of 74ACseries FPGA. You should not exceed 160MHzin its output frequency. 14terminations have occurred. The 74AC74family includes it. An input voltage of 3.3Vpowers the D latch. Input capacitance of this device is 3pF farads. In this case, the D flip flop belongs to the ACfamily. There is an electronic part that is mounted in the way of Surface Mount. Basically, it is designed with a set of 14 pins. It has a clock edge trigger type of Positive Edge. This device is part of the FF/Latchesbase part number family. 6Vis the maximum supply voltage (Vsup). A normal operating voltage (Vsup) should remain above 2V. Due to its reliability, this T flip flop is well suited for TR. It is recommended that the supply voltage be kept at 5Vto maximize efficiency. As a result of its output current of 24mA, it is very flexible in terms of design. There are 1 output lines in this JK flip flop. 2μAquiescent current consumed. Currently, there are 2 channels available.
SN74AC74MDREP Features
Tape & Reel (TR) package
74AC series
14 pins
SN74AC74MDREP Applications
There are a lot of Texas Instruments SN74AC74MDREP Flip Flops applications.
- 2 – Bit synchronous counter
- Differential Individual
- Storage Registers
- Individual Asynchronous Resets
- Digital electronics systems
- Supports Live Insertion
- Functionally equivalent to the MC10/100EL29
- Pattern generators
- Modulo – n – counter
- Shift Registers