SN65LVDT101DR
| Parameters | |
|---|---|
| Factory Lead Time | 6 Weeks |
| Lifecycle Status | ACTIVE (Last Updated: 1 week ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 8 |
| Weight | 75.891673mg |
| Operating Temperature | -40°C~85°C |
| Packaging | Tape & Reel (TR) |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| ECCN Code | EAR99 |
| Type | Buffer, ReDriver |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | Line Driver or Receivers |
| Max Power Dissipation | 481mW |
| Technology | BIPOLAR |
| Voltage - Supply | 3V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Number of Functions | 1 |
| Supply Voltage | 3.3V |
| Base Part Number | 65LVDT101 |
| Output | LVPECL |
| Pin Count | 8 |
| Operating Supply Voltage | 3.3V |
| Number of Elements | 1 |
| Operating Supply Current | 61mA |
| Power Dissipation | 481mW |
| Output Current | 12μA |
| Propagation Delay | 900 ps |
| Turn On Delay Time | 900 ps |
| Logic Function | Translator |
| Input | CML, LVDS, LVPECL |
| Driver Number of Bits | 1 |
| Receiver Number of Bits | 1 |
| Interface Standard | EIA-644-A; TIA-644-A |
| Receive Delay-Max | 0.9 ns |
| Data Rate (Max) | 2Gbps |
| Transmit Delay-Max | 0.9 ns |
| Supply Voltage1-Nom | 3.3V |
| Delay Time | 630ps |
| Capacitance - Input | 0.6pF |
| Height | 1.75mm |
| Length | 4.9mm |
| Width | 3.91mm |
| Thickness | 1.58mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN65LVDT101DR Overview
There is a package of 8-SOIC (0.154, 3.90mm Width) for easy transportation of this power buffer.There are Tape & Reel (TR) packages available for this power buffer, which means it is ready for shipping.Easily adaptable Surface Mount universal mouthpiece.When it comes to types, this is a typical Buffer, ReDriver.The op amp buffer is powered by 3V~3.6V voltage.This facilitates CML, LVDS, LVPECL input.It is recommended that the operating temperature is set to -40°C~85°C to prevent malfunctions.For more pin-to-pin solutions, try "65LVDT101".On the op amp buffer, you will find 8 terminals.The peak reflow temperature of the material is 260.Due to the 3.3V voltage supply, this splitter can handle a multitude of demanding tasks.Power buffer pinouts begin with 8 pins.In terms of output, it outputs in LVPECL units.The 8 pins are on it.For mounting on PCBs or other boards, there is a Surface Mount.Power buffers like this one play a critical role in the industry.Voltage 61mA is needed to operate this power buffer.The voltage required for normal operation is 3.3V.Receiver uses 1-Bit technology.Power dissipation is 481mW at most for this splitter.An interface repeater signal with 1 elements.Current output from the spliter should be 12μA.
SN65LVDT101DR Features
A standard Line Driver or Receivers.
1-Bit receiver.
SN65LVDT101DR Applications
There are a lot of Texas Instruments SN65LVDT101DR Signal Buffers, Repeaters, Splitters applications.
- Clock Distribution
- Laptop Computers (for External Video Cards)
- Backplane Interconnect
- Industrial PCs
- DSLAMs
- Cellular Phone Base Stations
- Network Switches/Routers
- Loopback
- PECL-to-LVDS Translation
- Digital Cross-Connects