| Parameters |
| Mounting Type |
Surface Mount |
| Package / Case |
20-SOIC (0.295, 7.50mm Width) |
| Surface Mount |
YES |
| Operating Temperature |
0°C~70°C TA |
| Packaging |
Tube |
| Published |
2013 |
| Series |
74F |
| JESD-609 Code |
e4 |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
| Number of Terminations |
20 |
| Type |
D-Type |
| Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory |
FF/Latches |
| Technology |
TTL |
| Voltage - Supply |
4.5V~5.5V |
| Terminal Position |
DUAL |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
260 |
| Supply Voltage |
5V |
| Reach Compliance Code |
unknown |
| Time@Peak Reflow Temperature-Max (s) |
30 |
| Base Part Number |
74F534 |
| JESD-30 Code |
R-PDSO-G20 |
| Function |
Standard |
| Qualification Status |
Not Qualified |
| Output Type |
Tri-State, Inverted |
| Number of Elements |
1 |
| Supply Voltage-Max (Vsup) |
5.5V |
| Power Supplies |
5V |
| Supply Voltage-Min (Vsup) |
4.5V |
| Load Capacitance |
50pF |
| Number of Ports |
2 |
| Clock Frequency |
165MHz |
| Family |
F/FAST |
| Current - Quiescent (Iq) |
86mA |
| Output Characteristics |
3-STATE |
| Current - Output High, Low |
3mA 24mA |
| Max I(ol) |
0.024 A |
| Number of Bits per Element |
8 |
| Max Propagation Delay @ V, Max CL |
7ns @ 5V, 50pF |
| Trigger Type |
Positive Edge |
| Propagation Delay (tpd) |
7.5 ns |
| Height Seated (Max) |
2.65mm |
| Width |
7.5mm |
| RoHS Status |
ROHS3 Compliant |
N74F534D,602 Overview
The item is packaged in 20-SOIC (0.295, 7.50mm Width)cases. D flip flop is embedded in the Tube package. The output it is configured with uses Tri-State, Inverted. It is configured with a trigger that uses a value of Positive Edge. There is an electronic component mounted in the way of Surface Mount. A voltage of 4.5V~5.5Vis required for its operation. In this case, the operating temperature is 0°C~70°C TA. This D latch has the type D-Type. JK flip flop is a part of the 74Fseries of FPGAs. It should not exceed 165MHzin terms of its output frequency. The element count is 1 . Despite external influences, it consumes 86mAof quiescent current. It has been determined that there have been 20 terminations. The 74F534 family contains it. A voltage of 5V is used as the power supply for this D latch. An electronic device belonging to the family F/FASTcan be found here. It is included in FF/Latches. It reaches the maximum supply voltage (Vsup) at 5.5V. For normal operation, the supply voltage (Vsup) should be above 4.5V. A total of 5V power supplies are needed to run it. The flip flop contains 2ports.
N74F534D,602 Features
Tube package
74F series
5V power supplies
N74F534D,602 Applications
There are a lot of NXP USA Inc. N74F534D,602 Flip Flops applications.
- Registers
- Differential Individual
- Latch
- Patented noise
- Communications
- Frequency Divider circuits
- Control circuits
- Counters
- Load Control
- Functionally equivalent to the MC10/100EL29