| Parameters |
| Family |
HCT |
| Current - Quiescent (Iq) |
8μA |
| Output Characteristics |
3-STATE |
| Current - Output High, Low |
7.2mA 7.2mA |
| Output Polarity |
TRUE |
| Number of Bits per Element |
8 |
| Max Propagation Delay @ V, Max CL |
46ns @ 5V, 150pF |
| Trigger Type |
Positive Edge |
| Input Capacitance |
10pF |
| Propagation Delay (tpd) |
57 ns |
| Length |
26.075mm |
| Width |
7.62mm |
| RoHS Status |
ROHS3 Compliant |
| Mounting Type |
Through Hole |
| Package / Case |
20-DIP (0.300, 7.62mm) |
| Surface Mount |
NO |
| Operating Temperature |
-40°C~85°C TA |
| Packaging |
Tube |
| Series |
74HCT |
| JESD-609 Code |
e3 |
| Pbfree Code |
yes |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
| Number of Terminations |
20 |
| Type |
D-Type |
| Terminal Finish |
MATTE TIN |
| Technology |
CMOS |
| Voltage - Supply |
4.5V~5.5V |
| Terminal Position |
DUAL |
| Peak Reflow Temperature (Cel) |
NOT APPLICABLE |
| Supply Voltage |
5V |
| Terminal Pitch |
2.54mm |
| Time@Peak Reflow Temperature-Max (s) |
NOT APPLICABLE |
| JESD-30 Code |
R-PDIP-T20 |
| Function |
Standard |
| Qualification Status |
Not Qualified |
| Output Type |
Tri-State, Non-Inverted |
| Number of Elements |
1 |
| Supply Voltage-Max (Vsup) |
5.5V |
| Supply Voltage-Min (Vsup) |
4.5V |
| Number of Ports |
2 |
| Clock Frequency |
30MHz |
MM74HCT374N Overview
20-DIP (0.300, 7.62mm)is the packaging method. The package Tubecontains it. T flip flop is configured with an output of Tri-State, Non-Inverted. The trigger it is configured with uses Positive Edge. In this case, the electronic component is mounted in the way of Through Hole. A supply voltage of 4.5V~5.5V is required for operation. In the operating environment, the temperature is -40°C~85°C TA. This D latch has the type D-Type. The 74HCTseries comprises this type of FPGA. A frequency of 30MHzshould be the maximum output frequency. There are 1 elements in it. During its operation, it consumes 8μA quiescent energy. A total of 20terminations have been recorded. The power source is powered by 5V. The input capacitance of this JK flip flopis 10pF farads. In this case, the D flip flop belongs to the HCTfamily. Vsup reaches 5.5V, the maximal supply voltage. For normal operation, the supply voltage (Vsup) should be kept above 4.5V. This D flip flop is equipped with 0 ports.
MM74HCT374N Features
Tube package
74HCT series
MM74HCT374N Applications
There are a lot of Rochester Electronics, LLC MM74HCT374N Flip Flops applications.
- 2 – Bit synchronous counter
- Registers
- Differential Individual
- Count Modes
- ESCC
- Storage Registers
- Data Synchronizers
- Balanced 24 mA output drivers
- Load Control
- Data storage