| Parameters |
| Mount |
Surface Mount |
| Mounting Type |
Surface Mount |
| Package / Case |
20-SOIC (0.209, 5.30mm Width) |
| Number of Pins |
20 |
| Operating Temperature |
-40°C~85°C TA |
| Packaging |
Tube |
| Published |
2011 |
| Series |
74LVX |
| JESD-609 Code |
e4 |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
| Number of Terminations |
20 |
| Type |
D-Type |
| Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory |
FF/Latches |
| Packing Method |
RAIL |
| Technology |
CMOS |
| Voltage - Supply |
2V~3.6V |
| Terminal Position |
DUAL |
| Terminal Form |
GULL WING |
| Supply Voltage |
2.7V |
| Base Part Number |
74LVX374 |
| Function |
Standard |
| Output Type |
Tri-State, Non-Inverted |
| Number of Elements |
1 |
| Polarity |
Non-Inverting |
| Supply Voltage-Min (Vsup) |
2V |
| Number of Circuits |
8 |
| Load Capacitance |
50pF |
| Number of Ports |
2 |
| Number of Bits |
8 |
| Clock Frequency |
95MHz |
| Propagation Delay |
19.8 ns |
| Turn On Delay Time |
6.7 ns |
| Family |
LV/LV-A/LVX/H |
| Logic Function |
D-Type, Flip-Flop |
| Current - Quiescent (Iq) |
4μA |
| Current - Output High, Low |
4mA 4mA |
| Max I(ol) |
0.004 A |
| Max Propagation Delay @ V, Max CL |
14.1ns @ 3.3V, 50pF |
| Trigger Type |
Positive Edge |
| Input Capacitance |
4pF |
| Number of Output Lines |
3 |
| Clock Edge Trigger Type |
Positive Edge |
| Max Frequency@Nom-Sup |
55000000Hz |
| Height Seated (Max) |
2.05mm |
| Width |
5.275mm |
| Radiation Hardening |
No |
| RoHS Status |
Non-RoHS Compliant |
| Lead Free |
Contains Lead |
MC74LVX374M Overview
As a result, it is packaged as 20-SOIC (0.209, 5.30mm Width). Package Tubeembeds it. T flip flop uses Tri-State, Non-Invertedas the output. There is a trigger configured with Positive Edge. It is mounted in the way of Surface Mount. It operates with a supply voltage of 2V~3.6V. Temperature is set to -40°C~85°C TA. D-Typedescribes this flip flop. JK flip flop is a part of the 74LVXseries of FPGAs. In order for it to function properly, its output frequency should not exceed 95MHz. A total of 1elements are present in it. As a result, it consumes 4μA quiescent current. A total of 20terminations have been recorded. The 74LVX374 family contains it. The D flip flop is powered by a voltage of 2.7V . There is 4pF input capacitance for this T flip flop. The electronic device belongs to the LV/LV-A/LVX/Hfamily. A part of the electronic system is mounted in the way of Surface Mount. The electronic flip flop is designed with pins 20. This device exhibits a clock edge trigger type of Positive Edge. This part is included in FF/Latches. This flip flop is designed with 8 Bits. It is imperative that the supply voltage (Vsup) is maintained above 2Vin order to ensure normal operation. Despite its superior flexibility, it relies on 8 circuits to achieve it. Compared to other similar T flip flops, this device offers reliable performance and is well suited for RAIL. The flip flop contains 2ports. The JK flip flop is with 3 output lines to operate.
MC74LVX374M Features
Tube package
74LVX series
20 pins
8 Bits
MC74LVX374M Applications
There are a lot of ON Semiconductor MC74LVX374M Flip Flops applications.
- Power down protection
- ATE
- CMOS Process
- Balanced Propagation Delays
- Functionally equivalent to the MC10/100EL29
- Convert a momentary switch to a toggle switch
- Individual Asynchronous Resets
- Consumer
- Data Synchronizers
- Latch-up performance