MC74ACT374DWG
| Parameters | |
|---|---|
| Factory Lead Time | 9 Weeks |
| Lifecycle Status | ACTIVE (Last Updated: 1 week ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Number of Pins | 20 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Published | 2006 |
| Series | 74ACT |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 20 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Tin (Sn) |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Base Part Number | 74ACT374 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Operating Supply Voltage | 5V |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Power Supplies | 5V |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Number of Bits | 8 |
| Clock Frequency | 160MHz |
| Propagation Delay | 12.5 ns |
| Turn On Delay Time | 8.5 ns |
| Family | ACT |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 8μA |
| Halogen Free | Halogen Free |
| Current - Output High, Low | 24mA 24mA |
| Max I(ol) | 0.024 A |
| Max Propagation Delay @ V, Max CL | 10ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| Number of Output Lines | 3 |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 90000000Hz |
| Height | 2.4mm |
| Length | 12.95mm |
| Width | 7.6mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
MC74ACT374DWG Overview
The package is in the form of 20-SOIC (0.295, 7.50mm Width). You can find it in the Tubepackage. There is a Tri-State, Non-Invertedoutput configured with it. JK flip flop uses Positive Edgeas the trigger. In this case, the electronic component is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 4.5V~5.5V. It is operating at -40°C~85°C TA. This D latch has the type D-Type. The FPGA belongs to the 74ACT series. It should not exceed 160MHzin terms of its output frequency. D latch consists of 1 elements. As a result, it consumes 8μA quiescent current. There have been 20 terminations. The 74ACT374 family contains it. It is powered by a voltage of 5V . A 4.5pFfarad input capacitance is provided by this T flip flop. The electronic device belongs to the ACTfamily. Electronic part Surface Mountis mounted in the way. As you can see from the design, it has pins with 20. This device exhibits a clock edge trigger type of Positive Edge. It is part of the FF/Latchesbase part number family. Flip flops designed with 8bits are used in this part. Using 8 circuits, it is highly flexible. The D latch runs on a voltage of 5V volts. The flip flop has 2ports embedded within it. If high efficiency is desired, the supply voltage should be kept at 5V. It operates with 3 output lines.
MC74ACT374DWG Features
Tube package
74ACT series
20 pins
8 Bits
5V power supplies
MC74ACT374DWG Applications
There are a lot of ON Semiconductor MC74ACT374DWG Flip Flops applications.
- Frequency division
- Load Control
- Balanced Propagation Delays
- Test & Measurement
- Divide a clock signal by 2 or 4
- Communications
- Computers
- Balanced 24 mA output drivers
- Cold spare funcion
- Bus hold