MC74ACT374DW
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Published | 2016 |
| Series | 74ACT |
| JESD-609 Code | e0 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | TIN LEAD |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 240 |
| Supply Voltage | 5V |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| JESD-30 Code | R-PDSO-G20 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Number of Ports | 2 |
| Clock Frequency | 160MHz |
| Family | ACT |
| Current - Quiescent (Iq) | 8μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 24mA 24mA |
| Output Polarity | TRUE |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 10ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| Height Seated (Max) | 2.65mm |
| Width | 7.5mm |
| RoHS Status | Non-RoHS Compliant |
MC74ACT374DW Overview
20-SOIC (0.295, 7.50mm Width)is the way it is packaged. It is contained within the Tubepackage. T flip flop uses Tri-State, Non-Invertedas its output configuration. The trigger it is configured with uses Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. A 4.5V~5.5Vsupply voltage is required for it to operate. A temperature of -40°C~85°C TAis used in the operation. This electronic flip flop is of type D-Type. The FPGA belongs to the 74ACT series. In order for it to function properly, its output frequency should not exceed 160MHz. A total of 1elements are contained within it. T flip flop consumes 8μA quiescent energy. A total of 20 terminations have been made. Power is provided by a 5V supply. Input capacitance of this device is 4.5pF farads. It is a member of the ACTfamily of D flip flop. As soon as 5.5Vis reached, Vsup reaches its maximum value. Normal operation requires a supply voltage (Vsup) above 4.5V. A D flip flop with 2embedded ports is available.
MC74ACT374DW Features
Tube package
74ACT series
MC74ACT374DW Applications
There are a lot of Rochester Electronics, LLC MC74ACT374DW Flip Flops applications.
- Buffered Clock
- Frequency division
- Buffer registers
- Single Down Count-Control Line
- Data storage
- Dynamic threshold performance
- Communications
- ESCC
- Functionally equivalent to the MC10/100EL29
- Memory