| Parameters |
| Output Type |
Non-Inverted |
| Number of Elements |
1 |
| Supply Voltage-Max (Vsup) |
6V |
| Supply Voltage-Min (Vsup) |
2V |
| Clock Frequency |
140MHz |
| Family |
AC |
| Current - Quiescent (Iq) |
8μA |
| Current - Output High, Low |
24mA 24mA |
| Output Polarity |
TRUE |
| Number of Bits per Element |
8 |
| Max Propagation Delay @ V, Max CL |
10ns @ 5V, 50pF |
| Trigger Type |
Positive Edge |
| Input Capacitance |
4.5pF |
| Length |
6.5mm |
| Width |
4.4mm |
| RoHS Status |
ROHS3 Compliant |
| Mounting Type |
Surface Mount |
| Package / Case |
20-TSSOP (0.173, 4.40mm Width) |
| Surface Mount |
YES |
| Operating Temperature |
-40°C~85°C TA |
| Packaging |
Tube |
| Series |
74AC |
| JESD-609 Code |
e4 |
| Pbfree Code |
yes |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
| Number of Terminations |
20 |
| Type |
D-Type |
| Terminal Finish |
NICKEL PALLADIUM GOLD |
| Technology |
CMOS |
| Voltage - Supply |
2V~6V |
| Terminal Position |
DUAL |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
260 |
| Supply Voltage |
5V |
| Terminal Pitch |
0.65mm |
| Reach Compliance Code |
unknown |
| Time@Peak Reflow Temperature-Max (s) |
40 |
| JESD-30 Code |
R-PDSO-G20 |
| Function |
Standard |
| Qualification Status |
COMMERCIAL |
MC74AC377DT Overview
20-TSSOP (0.173, 4.40mm Width)is the packaging method. D flip flop is embedded in the Tube package. As configured, the output uses Non-Inverted. The trigger configured with it uses Positive Edge. Surface Mountis in the way of this electric part. A supply voltage of 2V~6V is required for operation. A temperature of -40°C~85°C TAis used in the operation. This D latch has the type D-Type. JK flip flop belongs to the 74ACseries of FPGAs. A frequency of 140MHzshould not be exceeded by its output. A total of 1elements are present in it. It consumes 8μA of quiescent current without being affected by external factors. There are 20 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. Power is provided by a 5V supply. A JK flip flop with a 4.5pFfarad input capacitance is used here. In this case, the D flip flop belongs to the ACfamily. It reaches 6Vwhen the maximum supply voltage (Vsup) is applied. Normal operation requires a supply voltage (Vsup) above 2V.
MC74AC377DT Features
Tube package
74AC series
MC74AC377DT Applications
There are a lot of Rochester Electronics, LLC MC74AC377DT Flip Flops applications.
- High Performance Logic for test systems
- Common Clocks
- Count Modes
- Storage registers
- Dynamic threshold performance
- Functionally equivalent to the MC10/100EL29
- Consumer
- Event Detectors
- ESD performance
- Control circuits