| Parameters |
| Mounting Type |
Surface Mount |
| Package / Case |
16-SOIC (0.209, 5.30mm Width) |
| Surface Mount |
YES |
| Operating Temperature |
0°C~75°C TA |
| Packaging |
Tube |
| Series |
10H |
| JESD-609 Code |
e4 |
| Pbfree Code |
yes |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
| Number of Terminations |
16 |
| Type |
D-Type |
| Terminal Finish |
NICKEL PALLADIUM GOLD |
| Technology |
ECL |
| Voltage - Supply |
-4.9V~-5.46V |
| Terminal Position |
DUAL |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
NOT SPECIFIED |
| Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
| Function |
Standard |
| Qualification Status |
COMMERCIAL |
| Output Type |
Non-Inverted |
| Number of Elements |
1 |
| Clock Frequency |
250MHz |
| Family |
10H |
| Current - Quiescent (Iq) |
112mA |
| Output Polarity |
TRUE |
| Number of Bits per Element |
6 |
| Trigger Type |
Positive Edge |
| Propagation Delay (tpd) |
2.2 ns |
| fmax-Min |
250 MHz |
| Height Seated (Max) |
2.05mm |
| Width |
5.275mm |
| RoHS Status |
ROHS3 Compliant |
MC10H176MG Overview
16-SOIC (0.209, 5.30mm Width)is the way it is packaged. As part of the package Tube, it is embedded. Non-Invertedis the output configured for it. JK flip flop uses Positive Edgeas the trigger. The electronic part is mounted in the way of Surface Mount. A supply voltage of -4.9V~-5.46V is required for operation. It is operating at a temperature of 0°C~75°C TA. It is an electronic flip flop with the type D-Type. It is a type of FPGA belonging to the 10H series. Its output frequency should not exceed 250MHz Hz. The element count is 1 . It consumes 112mA of quiescent current without being affected by external factors. It has been determined that there have been 16 terminations. It is a member of the 10Hfamily of D flip flop.
MC10H176MG Features
Tube package
10H series
MC10H176MG Applications
There are a lot of Rochester Electronics, LLC MC10H176MG Flip Flops applications.
- Buffer registers
- Differential Individual
- 2 – Bit synchronous counter
- Reduced system switching noise
- Divide a clock signal by 2 or 4
- CMOS Process
- Count Modes
- Consumer
- EMI reduction circuitry
- Matched Rise and Fall