MC100LVEL31DTG
| Parameters | |
|---|---|
| Factory Lead Time | 5 Weeks |
| Lifecycle Status | ACTIVE (Last Updated: 4 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-TSSOP, 8-MSOP (0.118, 3.00mm Width) |
| Number of Pins | 8 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Published | 2000 |
| Series | 100LVEL |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 8 |
| Type | D-Type |
| Terminal Finish | Tin (Sn) |
| Subcategory | FF/Latches |
| Packing Method | RAIL |
| Technology | ECL |
| Voltage - Supply | -3V~-3.8V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Base Part Number | 100LVEL31 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Power Supplies | -3.3V |
| Supply Voltage-Min (Vsup) | 3V |
| Number of Circuits | 1 |
| Output Current | 50mA |
| Number of Bits | 1 |
| Clock Frequency | 2.9GHz |
| Propagation Delay | 590 ps |
| Turn On Delay Time | 475 ps |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 35mA |
| Halogen Free | Halogen Free |
| Trigger Type | Positive Edge |
| fmax-Min | 2900 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 2900000000Hz |
| Length | 3mm |
| Width | 3mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
MC100LVEL31DTG Overview
8-TSSOP, 8-MSOP (0.118, 3.00mm Width)is the way it is packaged. You can find it in the Tubepackage. T flip flop uses Differentialas the output. JK flip flop uses Positive Edgeas the trigger. Surface Mountis occupied by this electronic component. The supply voltage is set to -3V~-3.8V. In this case, the operating temperature is -40°C~85°C TA. It is an electronic flip flop with the type D-Type. It is a type of FPGA belonging to the 100LVEL series. It should not exceed 2.9GHzin its output frequency. As a result, it consumes 35mA quiescent current. In 8terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. The 100LVEL31 family contains this object. A voltage of 3.3V is used to power it. Surface Mount mounts this electronic component. The electronic flip flop is designed with pins 8. This device has Positive Edgeas its clock edge trigger type. It is included in FF/Latches. This flip flop is designed with 1 Bits. The supply voltage (Vsup) should be maintained above 3V for normal operation. Using 1 circuits, it is highly flexible. Considering the reliability of this T flip flop, it is well suited for RAIL. The D latch operates on -3.3V volts. The output current of 50mA makes it feature maximum design flexibility.
MC100LVEL31DTG Features
Tube package
100LVEL series
8 pins
1 Bits
-3.3V power supplies
MC100LVEL31DTG Applications
There are a lot of ON Semiconductor MC100LVEL31DTG Flip Flops applications.
- EMI reduction circuitry
- Control circuits
- Convert a momentary switch to a toggle switch
- Frequency Dividers
- Data Synchronizers
- Bus hold
- ATE
- Registers
- Event Detectors
- Patented noise