| Parameters |
| Packaging |
Tape & Reel (TR) |
| Published |
2006 |
| Series |
100EP |
| JESD-609 Code |
e3 |
| Pbfree Code |
yes |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
| Number of Terminations |
20 |
| Type |
D-Type |
| Terminal Finish |
Tin (Sn) |
| Additional Feature |
NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V |
| Subcategory |
FF/Latches |
| Technology |
ECL |
| Voltage - Supply |
-3V~-5.5V |
| Terminal Position |
QUAD |
| Terminal Form |
NO LEAD |
| Peak Reflow Temperature (Cel) |
NOT SPECIFIED |
| Supply Voltage |
3.3V |
| Terminal Pitch |
0.5mm |
| Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
| Base Part Number |
100EP29 |
| Function |
Set(Preset) and Reset |
| Qualification Status |
Not Qualified |
| Output Type |
Differential |
| Polarity |
Non-Inverting |
| Supply Voltage-Max (Vsup) |
5.5V |
| Power Supplies |
-4.5V |
| Supply Voltage-Min (Vsup) |
3V |
| Number of Circuits |
2 |
| Clock Frequency |
3GHz |
| Propagation Delay |
500 ps |
| Turn On Delay Time |
420 ps |
| Logic Function |
AND |
| Current - Quiescent (Iq) |
57mA |
| Halogen Free |
Halogen Free |
| Number of Bits per Element |
1 |
| Trigger Type |
Positive, Negative |
| High Level Output Current |
-50mA |
| Low Level Output Current |
50mA |
| Number of Output Lines |
1 |
| Clock Edge Trigger Type |
Positive Edge |
| Length |
4mm |
| Width |
4mm |
| RoHS Status |
RoHS Compliant |
| Lead Free |
Lead Free |
| Factory Lead Time |
12 Weeks |
| Mount |
Surface Mount |
| Mounting Type |
Surface Mount |
| Package / Case |
20-VFQFN Exposed Pad |
| Number of Pins |
20 |
| Operating Temperature |
-40°C~85°C TA |
MC100EP29MNTXG Overview
In the form of 20-VFQFN Exposed Pad, it has been packaged. It is contained within the Tape & Reel (TR)package. Differentialis the output configured for it. In the configuration of the trigger, Positive, Negativeis used. There is an electronic component mounted in the way of Surface Mount. A voltage of -3V~-5.5Vis used as the supply voltage. A temperature of -40°C~85°C TAis used in the operation. It is an electronic flip flop with the type D-Type. JK flip flop belongs to the 100EPseries of FPGAs. A frequency of 3GHzshould not be exceeded by its output. As a result, it consumes 57mA quiescent current. Currently, there are 20 terminations. This D latch belongs to the family of 100EP29. A voltage of 3.3V is used as the power supply for this D latch. Electronic part Surface Mountis mounted in the way. There are 20pins on it. This device exhibits a clock edge trigger type of Positive Edge. This device is part of the FF/Latchesbase part number family. The maximal supply voltage (Vsup) reaches 5.5V. For normal operation, the supply voltage (Vsup) should be kept above 3V. 2 circuits are used to achieve its superior flexibility. It operates from -4.5V power supplies. There are 1 output Lines, which generate the binary equivalent of the input line whose value is equal to “1” and are available to encode either a decimal or hexadecimal input pattern to typically a binary or “B. C. D” (binary coded decimal) output code. Additionally, you may refer to the additional NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V of the electronic flip flop. -50mAis the output current at high level. It is set to 50mAfor the low level output current.
MC100EP29MNTXG Features
Tape & Reel (TR) package
100EP series
20 pins
-4.5V power supplies
MC100EP29MNTXG Applications
There are a lot of ON Semiconductor MC100EP29MNTXG Flip Flops applications.
- Individual Asynchronous Resets
- Patented noise
- Parallel data storage
- Functionally equivalent to the MC10/100EL29
- Reduced system switching noise
- Control circuits
- QML qualified product
- Latch
- Registers
- Buffered Clock