M5LV-256/68-5YC
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 100-BQFP |
| Surface Mount | YES |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tray |
| Published | 1995 |
| Series | MACH® 5 |
| JESD-609 Code | e0 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 100 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Additional Feature | YES |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 225 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.65mm |
| Reach Compliance Code | not_compliant |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | M5LV-256 |
| Pin Count | 100 |
| JESD-30 Code | S-PQFP-G100 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 3.3V |
| Programmable Type | In System Programmable |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Number of I/O | 68 |
| Memory Type | EEPROM |
| Propagation Delay | 5.5 ns |
| Number of Gates | 10000 |
| Max Frequency | 133MHz |
| Number of Programmable I/O | 208 |
| Output Function | MACROCELL |
| Number of Macro Cells | 256 |
| JTAG BST | YES |
| Voltage Supply - Internal | 3V~3.6V |
| Delay Time tpd(1) Max | 5.5ns |
| Height Seated (Max) | 3.4mm |
| Length | 20mm |
| Width | 14mm |
| RoHS Status | Non-RoHS Compliant |
M5LV-256/68-5YC Overview
There are 256 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.100-BQFPis the package in which it resides.The device is programmed with 68 I/O ports.The termination of a device is set to [0].This electrical part is wired with a terminal position of QUAD.A voltage of 3.3V is used as the power supply for this device.It is a part of the family [0].Package the chip by Tray.In order to ensure the reliability of the device, it is designed to operate at a temperature of [0].It is recommended that the chip be mounted by Surface Mount.FPGAs belonging to the MACH? 5series contain this type of chip.The chip is programmed with 100 pins.It is also characterized by YES.Its related parts can be found in the [0].The 10000gates serve as building blocks for digital circuits.A high level of efficiency can be achieved by maintaining the supply voltage at [0].Data storage is performed using [0].There is a maximum supply voltage of 3.6V.It is powered by 3Vas its minimum supply voltage.There are 208 programmable I/Os, which are method of data transmissions, via input/output (I/O), between a central processing unit (CPU) and a peripheral device, such as a network adapter or a Parallel ATA storage device. There should be a lower maximum frequency than 133MHz.
M5LV-256/68-5YC Features
100-BQFP package
68 I/Os
The operating temperature of 0°C~70°C TA
100 pin count
M5LV-256/68-5YC Applications
There are a lot of Lattice Semiconductor Corporation M5LV-256/68-5YC CPLDs applications.
- D/T registers and latches
- Network Interface Card (NIC) and Host Bus Adapter (HBA)
- Cross-Matrix Switch
- White goods (Washing, Cold, Aircon ,...)
- Custom shift registers
- Digital designs
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- Complex programmable logic devices
- Software Configuration of Add-In Boards
- Preset swapping