LC5512MC-75QN208I
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 208-BFQFP |
| Number of Pins | 208 |
| Operating Temperature | -40°C~105°C TJ |
| Packaging | Tray |
| Published | 2000 |
| Series | ispXPLD® 5000MC |
| JESD-609 Code | e3 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 208 |
| ECCN Code | EAR99 |
| Terminal Finish | Matte Tin (Sn) |
| Additional Feature | YES |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 245 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.5mm |
| Reach Compliance Code | unknown |
| Frequency | 200MHz |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Base Part Number | LC5512 |
| Pin Count | 208 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 1.8V |
| Programmable Type | In System Programmable |
| Max Supply Voltage | 1.95V |
| Min Supply Voltage | 1.65V |
| Operating Supply Current | 22mA |
| Number of I/O | 149 |
| Nominal Supply Current | 22mA |
| RAM Size | 32kB |
| Memory Type | EEPROM, SRAM |
| Propagation Delay | 7.5 ns |
| Number of Programmable I/O | 100 |
| Output Function | MACROCELL |
| Number of Macro Cells | 512 |
| JTAG BST | YES |
| Voltage Supply - Internal | 1.65V~1.95V |
| Number of Logic Elements/Blocks | 16 |
| Height Seated (Max) | 4.1mm |
| Length | 28mm |
| Width | 28mm |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
LC5512MC-75QN208I Overview
There are 512 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).The item is enclosed in a 208-BFQFP package.In this case, there are 149 I/Os programmed.There is a 208terminations set on devices.QUADis the terminal position of this electrical part.An electrical supply voltage of 1.8V is used to power it.It is a part of the family [0].The chip should be packaged by Tray.A reliable operation is ensured by the operating temperature of [0].Ideally, the chip should be mounted by Surface Mount.The ispXPLD? 5000MCseries comprises this type of FPGA.In this chip, the 208pins are programmed.Additionally, this device is capable of displaying [0].In accordance with the [0], its related parts are listed.Optimal efficiency requires a supply voltage of [0].Data storage is performed using [0].This device is mounted by Surface Mount.208pins are included in its design.There is a maximum supply voltage of 1.95V.The minimal supply voltage is 1.65V.16logic blocks/elements are present.There are a total of 100 Programmable I/Os.A frequency of 200MHzcan be achieved.
LC5512MC-75QN208I Features
208-BFQFP package
149 I/Os
The operating temperature of -40°C~105°C TJ
208 pin count
208 pins
LC5512MC-75QN208I Applications
There are a lot of Lattice Semiconductor Corporation LC5512MC-75QN208I CPLDs applications.
- Page register
- Cross-Matrix Switch
- Timing control
- Protection relays
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- Random logic replacement
- Handheld digital devices
- Synchronous or asynchronous mode
- Digital multiplexers
- Software Configuration of Add-In Boards