LC5512MC-75FN484C
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 484-BBGA |
| Number of Pins | 484 |
| Operating Temperature | 0°C~90°C TJ |
| Packaging | Tray |
| Published | 2000 |
| Series | ispXPLD® 5000MC |
| JESD-609 Code | e1 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 484 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
| Additional Feature | YES |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 250 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 1mm |
| Frequency | 200MHz |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Base Part Number | LC5512 |
| Pin Count | 484 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 1.8V |
| Programmable Type | In System Programmable |
| Max Supply Voltage | 1.95V |
| Min Supply Voltage | 1.65V |
| Operating Supply Current | 22mA |
| Number of I/O | 253 |
| Nominal Supply Current | 22mA |
| RAM Size | 32kB |
| Memory Type | EEPROM, SRAM |
| Propagation Delay | 7.5 ns |
| Turn On Delay Time | 7.5 ns |
| Number of Logic Elements/Cells | 16 |
| Number of Programmable I/O | 256 |
| Output Function | MACROCELL |
| Number of Macro Cells | 512 |
| JTAG BST | YES |
| Voltage Supply - Internal | 1.65V~1.95V |
| Height Seated (Max) | 2.6mm |
| Length | 23mm |
| Width | 23mm |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
LC5512MC-75FN484C Overview
There are 512 macro cells in the network, which are high-power cell sites that provide radio coverage (tower, antenna, or mast) for a mobile phone network.There is a 484-BBGA package containing it.It is programmed with 253 I/Os.Devices are programmed with terminations of [0].Its terminal position is BOTTOM.The power source is powered by 1.8Vvolts.There is a part included in Programmable Logic Devices.It is recommended to package the chip by Tray.To ensure its reliability, the operating temperature is set to [0].It is recommended that Surface Mountholds the chip in place.The ispXPLD? 5000MCseries FPGA is one of these types.A chip with 484pins is programmed.If you use this device, you will also find [0].Its related parts can be found in the [0].A high level of efficiency can be achieved by maintaining the supply voltage at [0].In order to store data, EEPROM, SRAMis used.Surface Mountmounts this electronic component.The device is designed with pins [0].With a maximum supply voltage of [0], it operates.Despite its minimal supply voltage of [0], it is capable of operating.Currently, there are 256 Programmable I/Os available.This can be achieved at a frequency of 200MHz.A fundamental building block of logic consists of 16logic elements/cells.
LC5512MC-75FN484C Features
484-BBGA package
253 I/Os
The operating temperature of 0°C~90°C TJ
484 pin count
484 pins
LC5512MC-75FN484C Applications
There are a lot of Lattice Semiconductor Corporation LC5512MC-75FN484C CPLDs applications.
- STANDARD SERIAL INTERFACE UART
- Cross-Matrix Switch
- Parity generators
- Field programmable gate
- Digital systems
- Storage Cards and Storage Racks
- USB Bus
- State machine design
- Page register
- POWER-SAVING MODES