LA4128V-75TN128E
| Parameters | |
|---|---|
| Factory Lead Time | 8 Weeks |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 128-LQFP |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tray |
| Published | 2000 |
| Series | LA-ispMACH |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 128 |
| ECCN Code | EAR99 |
| Terminal Finish | Matte Tin (Sn) |
| Additional Feature | YES |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.4mm |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Base Part Number | LA4128 |
| Pin Count | 128 |
| Qualification Status | Not Qualified |
| Programmable Type | In System Programmable |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Operating Supply Current | 12mA |
| Number of I/O | 92 |
| Nominal Supply Current | 12mA |
| Memory Type | EEPROM |
| Max Frequency | 168MHz |
| Screening Level | AEC-Q100 |
| Number of Logic Blocks (LABs) | 8 |
| Output Function | MACROCELL |
| Number of Macro Cells | 128 |
| JTAG BST | YES |
| Voltage Supply - Internal | 3V~3.6V |
| Delay Time tpd(1) Max | 7.5ns |
| Height Seated (Max) | 1.6mm |
| Length | 14mm |
| Width | 14mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
LA4128V-75TN128E Overview
There are 128 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.There is a 128-LQFP package containing it.As a result, it has 92 I/O ports programmed.The termination of a device is set to [0].The terminal position of this electrical part is QUAD, which serves as an important access point for passengers or freight.The device is powered by a voltage of 3.3V volts.The part is included in Programmable Logic Devices.The chip should be packaged by Tray.Ensure its reliability by operating at [0].It is recommended that Surface Mountholds the chip in place.The FPGA belongs to the LA-ispMACH series.Chips are programmed with 128 pins.If you use this device, you will also find [0].The LA4128indicates that related parts can be found.It is adopted to store data in [0].It is mounted by Surface Mount.There is a maximum supply voltage of 3.6Vwhen the device is operating.A minimum supply voltage of 3V is required for it to operate.168MHzis the maximum frequency.It consists of 8 logic blocks (LABs).
LA4128V-75TN128E Features
128-LQFP package
92 I/Os
The operating temperature of -40°C~125°C TA
128 pin count
8 logic blocks (LABs)
LA4128V-75TN128E Applications
There are a lot of Lattice Semiconductor Corporation LA4128V-75TN128E CPLDs applications.
- High speed graphics processing
- Protection relays
- TIMERS/COUNTERS
- Cross-Matrix Switch
- Pattern recognition
- Configurable Addressing of I/O Boards
- Digital systems
- Network Interface Card (NIC) and Host Bus Adapter (HBA)
- I2C BUS INTERFACE
- I/O PORTS (MCU MODULE)