LA4064ZC-75TN48E
| Parameters | |
|---|---|
| Factory Lead Time | 8 Weeks |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 48-TQFP |
| Number of Pins | 48 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tray |
| Published | 2000 |
| Series | LA-ispMACH |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 48 |
| ECCN Code | EAR99 |
| Terminal Finish | Matte Tin (Sn) |
| Additional Feature | YES |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Base Part Number | LA4064 |
| Pin Count | 48 |
| Qualification Status | Not Qualified |
| Power Supplies | 1.8V |
| Programmable Type | In System Programmable |
| Max Supply Voltage | 1.9V |
| Min Supply Voltage | 1.7V |
| Operating Supply Current | 109μA |
| Number of I/O | 32 |
| Nominal Supply Current | 109μA |
| Memory Type | EEPROM |
| Propagation Delay | 8 ns |
| Max Frequency | 168MHz |
| Screening Level | AEC-Q100 |
| Number of Logic Blocks (LABs) | 4 |
| Output Function | MACROCELL |
| Number of Macro Cells | 64 |
| JTAG BST | YES |
| Voltage Supply - Internal | 1.7V~1.9V |
| Delay Time tpd(1) Max | 7.5ns |
| Height Seated (Max) | 1.2mm |
| Length | 7mm |
| Width | 7mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
LA4064ZC-75TN48E Overview
A mobile phone network consists of 64macro cells, which are radio coverage cells served by a high-power cell site (tower, antenna or mast).The product is contained in a 48-TQFP package.There are 32 I/Os on the board.There are 48 terminations programmed into the device.Its terminal position is QUAD.Power is supplied by a voltage of 3.3V volts.It is a part of the family [0].It is recommended that the chip be packaged by Tray.It operates with the operating temperature of -40°C~125°C TA to ensure its reliability.Ensure that the chip is mounted by Surface Mount.It belongs to the LA-ispMACHseries of FPGAs.It has 48pins programmed.This device also displays [0].Its related parts can be found in the [0].It is adopted to store data in [0].In this case, Surface Mountis used to mount the electronic component.The device has a pinout of [0].This device operates at a voltage of 1.9Vas its maximum supply voltage.A minimum supply voltage of 1.7V is required for it to operate.It runs on a voltage of 1.8Vvolts.It is recommended that the maximum frequency be less than 168MHz.It consists of 4 logic blocks (LABs).
LA4064ZC-75TN48E Features
48-TQFP package
32 I/Os
The operating temperature of -40°C~125°C TA
48 pin count
48 pins
1.8V power supplies
4 logic blocks (LABs)
LA4064ZC-75TN48E Applications
There are a lot of Lattice Semiconductor Corporation LA4064ZC-75TN48E CPLDs applications.
- D/T registers and latches
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- Programmable polarity
- Discrete logic functions
- I/O PORTS (MCU MODULE)
- Boolean function generators
- Page register
- State machine design
- SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management
- PLC analog input modules