HEF40174BP,652
| Parameters | |
|---|---|
| Mounting Type | Through Hole |
| Package / Case | 16-DIP (0.300, 7.62mm) |
| Surface Mount | NO |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Published | 2012 |
| Series | 4000B |
| JESD-609 Code | e3 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | MATTE TIN |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 3V~15V |
| Terminal Position | DUAL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Terminal Pitch | 2.54mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 40174 |
| Function | Master Reset |
| Qualification Status | Not Qualified |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Min (Vsup) | 3V |
| Load Capacitance | 50pF |
| Clock Frequency | 45MHz |
| Current - Quiescent (Iq) | 80μA |
| Current - Output High, Low | 3mA 3mA |
| Output Polarity | TRUE |
| Number of Bits per Element | 6 |
| Max Propagation Delay @ V, Max CL | 45ns @ 15V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 7.5pF |
| fmax-Min | 5 MHz |
| Max Frequency@Nom-Sup | 5000000Hz |
| Height Seated (Max) | 4.7mm |
| RoHS Status | ROHS3 Compliant |
HEF40174BP,652 Overview
The flip flop is packaged in 16-DIP (0.300, 7.62mm). A package named Tubeincludes it. There is a Non-Invertedoutput configured with it. In the configuration of the trigger, Positive Edgeis used. There is an electrical part that is mounted in the way of Through Hole. A supply voltage of 3V~15V is required for operation. In this case, the operating temperature is -40°C~85°C TA. It is an electronic flip flop with the type D-Type. It is a type of FPGA belonging to the 4000B series. In order for it to function properly, its output frequency should not exceed 45MHz. D latch consists of 1 elements. There is 80μA quiescent consumption. The number of terminations is 16. The 40174 family contains this object. The D flip flop is powered by a voltage of 5V . A 7.5pFfarad input capacitance is provided by this T flip flop. The part you are looking for is included in FF/Latches. If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 3V.
HEF40174BP,652 Features
Tube package
4000B series
HEF40174BP,652 Applications
There are a lot of NXP USA Inc. HEF40174BP,652 Flip Flops applications.
- High Performance Logic for test systems
- Supports Live Insertion
- Digital electronics systems
- Single Down Count-Control Line
- 2 – Bit synchronous counter
- Divide a clock signal by 2 or 4
- Frequency Dividers
- Cold spare funcion
- ESD performance
- Safety Clamp