EPM9400RC240-20
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 240-BFQFP Exposed Pad |
| Surface Mount | YES |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tray |
| Series | MAX® 9000 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 240 |
| Terminal Finish | TIN LEAD |
| Additional Feature | 580 FLIP FLOPS; CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 5V |
| Terminal Pitch | 0.5mm |
| Reach Compliance Code | unknown |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Pin Count | 240 |
| JESD-30 Code | S-PQFP-G240 |
| Qualification Status | COMMERCIAL |
| Supply Voltage-Min (Vsup) | 4.75V |
| Programmable Type | In System Programmable |
| Number of I/O | 159 |
| Clock Frequency | 100MHz |
| Propagation Delay | 23.2 ns |
| Number of Gates | 8000 |
| Output Function | MACROCELL |
| Number of Macro Cells | 400 |
| Voltage Supply - Internal | 4.75V~5.25V |
| Delay Time tpd(1) Max | 20ns |
| Number of Logic Elements/Blocks | 25 |
| Height Seated (Max) | 4.1mm |
| Length | 32mm |
| Width | 32mm |
| RoHS Status | Non-RoHS Compliant |
EPM9400RC240-20 Overview
There are 400 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).In the 240-BFQFP Exposed Padpackage, you will find it.There are 159 I/Os programmed in it.The termination of a device is set to [0].The terminal position of this electrical component is QUAD.Power is provided by a supply voltage of 5V volts.Trayis the packaging method.The temperature at which it operates is set to 0°C~70°C TAin order to ensure its reliability.It is mounted in the way of Surface Mount.It is a type of FPGA belonging to the MAX? 9000 series.It is equipped with 240 pin count.It is also characterized by 580 FLIP FLOPS; CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V.8000gates are used to construct digital circuits.There are 25 logic elements/blocks.Vsup (supply voltage) must be greater than 4.75V.It should not exceed 100MHzin its clock frequency.
EPM9400RC240-20 Features
240-BFQFP Exposed Pad package
159 I/Os
The operating temperature of 0°C~70°C TA
240 pin count
EPM9400RC240-20 Applications
There are a lot of Rochester Electronics, LLC EPM9400RC240-20 CPLDs applications.
- Address decoders
- Digital designs
- PLC analog input modules
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- Configurable Addressing of I/O Boards
- Random logic replacement
- Programmable power management
- Cross-Matrix Switch
- Protection relays
- Dedicated input registers