EPM7256BFC256-10N
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Package / Case | FBGA |
| Number of Pins | 256 |
| Published | 1998 |
| JESD-609 Code | e1 |
| Pbfree Code | yes |
| Part Status | Discontinued |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 256 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Additional Feature | YES |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.5V |
| Terminal Pitch | 1mm |
| Frequency | 125MHz |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Pin Count | 256 |
| Qualification Status | Not Qualified |
| Power Supplies | 1.8/3.32.5V |
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Number of I/O | 164 |
| Memory Type | EEPROM |
| Propagation Delay | 10 ns |
| Turn On Delay Time | 10 ns |
| Frequency (Max) | 188.7MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 5000 |
| Number of Programmable I/O | 164 |
| Number of Logic Blocks (LABs) | 16 |
| Speed Grade | 10 |
| Output Function | MACROCELL |
| Number of Macro Cells | 256 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height Seated (Max) | 3.5mm |
| Length | 17mm |
| Width | 17mm |
| RoHS Status | RoHS Compliant |
EPM7256BFC256-10N Overview
256 macrocells are present in the mobile phone network, which offer radio coverage from a high-power cell tower, antenna, or mast.The item is packaged with FBGA.There are 164 I/Os on the board.The device is programmed with 256 terminations.This electrical component has a terminal position of 0.The power supply voltage is 2.5V.The part belongs to Programmable Logic Devices family.It has 256pins programmed.If you use this device, you will also find [0].The 5000gates serve as building blocks for digital circuits.For storing data, it is recommended to use [0].It is mounted by Surface Mount.It is designed with 256 pins.With a maximum supply voltage of [0], it operates.In order for it to operate, a supply voltage of 3Vis required.This device runs on 1.8/3.32.5Vvolts of electricity.Programmable I/Os are counted up 164.It is possible to achieve a frequency of 125MHz.It is recommended that the operating temperature exceeds 0°C.The operating temperature should be lower than 70°C.In total, it contains 16 logic blocks (LABs).It should be below 188.7MHzat the maximal frequency.A programmable logic type is classified as EE PLD.
EPM7256BFC256-10N Features
FBGA package
164 I/Os
256 pin count
256 pins
1.8/3.32.5V power supplies
16 logic blocks (LABs)
EPM7256BFC256-10N Applications
There are a lot of Altera EPM7256BFC256-10N CPLDs applications.
- Preset swapping
- Auxiliary Power Supply Isolated and Non-isolated
- Bootloaders for FPGAs
- ON-CHIP OSCILLATOR CIRCUIT
- ToR/Aggregation/Core Switch and Router
- Programmable power management
- Software Configuration of Add-In Boards
- Interface bridging
- ANALOG-TO-DIGITAL CONVERTOR (ADC)
- Synchronous or asynchronous mode