EPM7256AETC144-10
| Parameters | |
|---|---|
| Output Function | MACROCELL |
| Number of Macro Cells | 256 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height Seated (Max) | 1.6mm |
| Length | 20mm |
| Width | 20mm |
| RoHS Status | RoHS Compliant |
| Lead Free | Contains Lead |
| Factory Lead Time | 10 Weeks |
| Mount | Surface Mount |
| Package / Case | TQFP |
| Number of Pins | 44 |
| Packaging | Bulk |
| Published | 1998 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 144 |
| ECCN Code | 3A991 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Additional Feature | YES |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.5mm |
| Frequency | 125MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 144 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 3.3V |
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Number of I/O | 120 |
| Memory Type | EEPROM |
| Propagation Delay | 10 ns |
| Turn On Delay Time | 10 ns |
| Frequency (Max) | 172.4MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 5000 |
| Number of Programmable I/O | 36 |
| Number of Logic Blocks (LABs) | 16 |
| Speed Grade | 10 |
EPM7256AETC144-10 Overview
There are 256 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.A TQFP package contains the item.This device has 120 I/O ports programmed into it.It is programmed that device terminations will be 144 .This electrical part has a terminal position of [0], which serves as an important point of access for passengers and freight.It is powered by a voltage of 3.3V volts.There is a part included in Programmable Logic Devices.Bulkis the packaging method.With 144pins programmed, the chip is ready to use.When using this device, YEScan also be found.As a building block for digital circuits, there are 5000gates.High efficiency requires a voltage supply of [0].In order to store data, EEPROMis used.It is mounted by Surface Mount.This board has 44 pins.A voltage of 3.6V is the maximum supply voltage for this device.Normally, it operates with a voltage of 3VV as its minimum supply voltage.There are 36 Programmable I/Os.There is a maximum frequency of 125MHz.It is recommended that the operating temperature exceed 0°C.It is recommended to keep the operating temperature below 70°C.Its basic building block is composed of 16 logic blocks (LABs).If the maximal frequency is less than [0], it should be lower than that.This kind of FPGA is composed of EE PLD.
EPM7256AETC144-10 Features
TQFP package
120 I/Os
144 pin count
44 pins
16 logic blocks (LABs)
EPM7256AETC144-10 Applications
There are a lot of Altera EPM7256AETC144-10 CPLDs applications.
- Digital systems
- State machine control
- Dedicated input registers
- I2C BUS INTERFACE
- Portable digital devices
- Reset swapping
- Code converters
- Random logic replacement
- ToR/Aggregation/Core Switch and Router
- I/O PORTS (MCU MODULE)