EPM7128EQC160-15
| Parameters | |
|---|---|
| Factory Lead Time | 12 Weeks |
| Mount | Surface Mount |
| Package / Case | PQFP |
| Number of Pins | 160 |
| Published | 1998 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 160 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Additional Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.65mm |
| Frequency | 100MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 160 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 5V |
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 5.25V |
| Min Supply Voltage | 4.75V |
| Number of I/O | 100 |
| Memory Type | EEPROM |
| Propagation Delay | 15 ns |
| Turn On Delay Time | 15 ns |
| Frequency (Max) | 125MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 2500 |
| Number of Programmable I/O | 100 |
| Number of Logic Blocks (LABs) | 8 |
| Speed Grade | 15 |
| Output Function | MACROCELL |
| Number of Macro Cells | 128 |
| JTAG BST | NO |
| In-System Programmable | NO |
| Height Seated (Max) | 4.07mm |
| RoHS Status | RoHS Compliant |
| Lead Free | Contains Lead |
EPM7128EQC160-15 Overview
There are 128 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.The item is packaged with PQFP.There are 100 I/Os programmed in it.It is programmed to terminate devices at [0].Its terminal position is QUAD.It is powered from a supply voltage of 5V.The part belongs to Programmable Logic Devices family.With 160pins programmed, the chip is ready to use.It is also characterized by CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V.It is possible to construct digital circuits using 2500gates, which are devices that serve as building blocks.Optimal efficiency requires a supply voltage of [0].In this case, EEPROMwill be used to store the data.The electronic part is mounted by Surface Mount.It is designed with 160 pins.There is a maximum supply voltage of 5.25Vwhen the device is operating.It operates with the minimal supply voltage of 4.75V.Programmable I/Os are counted up 100.In this case, 100MHzis the frequency that can be achieved.It is recommended that the operating temperature exceed 0°C.It is recommended that the operating temperature be lower than 70°C.It is composed of 8 logic blocks (LABs).It should be below 125MHzat the maximal frequency.This kind of FPGA is composed of EE PLD.
EPM7128EQC160-15 Features
PQFP package
100 I/Os
160 pin count
160 pins
8 logic blocks (LABs)
EPM7128EQC160-15 Applications
There are a lot of Altera EPM7128EQC160-15 CPLDs applications.
- Field programmable gate
- Auxiliary Power Supply Isolated and Non-isolated
- Timing control
- Code converters
- Custom state machines
- TIMERS/COUNTERS
- INTERRUPT SYSTEM
- Digital systems
- Wireless Infrastructure Base Band Unit and Remote Radio Unit
- Programmable polarity