| Parameters |
| Mounting Type |
Surface Mount |
| Package / Case |
100-BQFP |
| Surface Mount |
YES |
| Operating Temperature |
0°C~70°C TA |
| Packaging |
Tray |
| Series |
MAX® 7000 |
| JESD-609 Code |
e0 |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
| Number of Terminations |
100 |
| ECCN Code |
EAR99 |
| Terminal Finish |
TIN LEAD |
| Additional Feature |
CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| Subcategory |
Programmable Logic Devices |
| Technology |
CMOS |
| Terminal Position |
QUAD |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
220 |
| Supply Voltage |
5V |
| Terminal Pitch |
0.65mm |
| Reach Compliance Code |
compliant |
| Time@Peak Reflow Temperature-Max (s) |
30 |
| Base Part Number |
EPM7128 |
| JESD-30 Code |
R-PQFP-G100 |
| Qualification Status |
Not Qualified |
| Supply Voltage-Max (Vsup) |
5.25V |
| Power Supplies |
3.3/55V |
| Supply Voltage-Min (Vsup) |
4.75V |
| Programmable Type |
EE PLD |
| Number of I/O |
84 |
| Propagation Delay |
20 ns |
| Number of Gates |
2500 |
| Output Function |
MACROCELL |
| Number of Macro Cells |
128 |
| JTAG BST |
NO |
| Voltage Supply - Internal |
4.75V~5.25V |
| Delay Time tpd(1) Max |
20ns |
| Number of Logic Elements/Blocks |
8 |
| Height Seated (Max) |
3.65mm |
| Length |
20mm |
| Width |
14mm |
| RoHS Status |
Non-RoHS Compliant |
EPM7128EQC100-20 Overview
There are 128 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).You can find it in package [0].The device is programmed with 84 I/Os.100terminations are programmed into the device.This electrical part has a terminal position of QUADand is connected to the ground.A voltage of 5Vprovides power to the device.It is a part of the family [0].Trayshould be used to package the chip.To ensure its reliability, the operating temperature is set to [0].Ensure that the chip is mounted by Surface Mount.This type of FPGA is a part of the MAX? 7000 series.When using this device, CONFIGURABLE I/O OPERATION WITH 3.3V OR 5Vcan also be found.There are related parts in [0].For digital circuits, there are 2500gates. These devices serve as building blocks.There are 8 logic elements/blocks, which are fundamental building blocks of field-programmable gate array (FPGA) technology.A power supply of 3.3/55Vis required to operate it.The maximal supply voltage (Vsup) reaches 5.25V.Voltage supply (Vsup) should be higher than 4.75V.
EPM7128EQC100-20 Features
100-BQFP package
84 I/Os
The operating temperature of 0°C~70°C TA
3.3/55V power supplies
EPM7128EQC100-20 Applications
There are a lot of Intel EPM7128EQC100-20 CPLDs applications.
- Synchronous or asynchronous mode
- Wide Vin Industrial low power SMPS
- TIMERS/COUNTERS
- Software-Driven Hardware Configuration
- Programmable polarity
- I2C BUS INTERFACE
- Boolean function generators
- Parity generators
- Address decoders
- Cross-Matrix Switch