EPM7128ELC84-12
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Package / Case | PLCC |
| Number of Pins | 84 |
| Published | 1998 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 2 |
| Number of Terminations | 84 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 1.27mm |
| Frequency | 125MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 84 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 5V |
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 5.25V |
| Min Supply Voltage | 4.75V |
| Number of I/O | 68 |
| Memory Type | EEPROM |
| Propagation Delay | 12 ns |
| Turn On Delay Time | 12 ns |
| Frequency (Max) | 125MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 2500 |
| Number of Programmable I/O | 68 |
| Number of Logic Blocks (LABs) | 8 |
| Speed Grade | 12 |
| Output Function | MACROCELL |
| Number of Macro Cells | 128 |
| JTAG BST | NO |
| In-System Programmable | NO |
| Length | 29.3116mm |
| Width | 29.3116mm |
| RoHS Status | RoHS Compliant |
| Lead Free | Contains Lead |
EPM7128ELC84-12 Overview
There are 128 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.You can find it in package [0].As you can see, this device has 68 I/O ports programmed into it.It is programmed that device terminations will be 84 .Its terminal position is QUAD.There is 5V voltage supply for this device.It belongs to the family [0].In this chip, the 84pins are programmed.The 2500gates serve as building blocks for digital circuits.In order to maintain high efficiency, the supply voltage should be maintained at [0].Data is stored using [0].A Surface Mountis mounted on this electronic component.It is designed with 84 pins.This device operates at a voltage of 5.25V when the maximum supply voltage is applied.In order for it to operate, a supply voltage of 4.75Vis required.In total, there are 68programmable I/Os.A frequency of 125MHzcan be achieved.Operating temperatures should be higher than 0°C.It is recommended that the operating temperature be below 70°C.Its basic building block is composed of 8 logic blocks (LABs).It is recommended that the maximum frequency is less than 0.There are several types of programmable logic that can be categorized as EE PLD.
EPM7128ELC84-12 Features
PLCC package
68 I/Os
84 pin count
84 pins
8 logic blocks (LABs)
EPM7128ELC84-12 Applications
There are a lot of Altera EPM7128ELC84-12 CPLDs applications.
- Configurable Addressing of I/O Boards
- Multiple DIP Switch Replacement
- Custom state machines
- Pattern recognition
- ON-CHIP OSCILLATOR CIRCUIT
- Dedicated input registers
- PULSE WIDTH MODULATION (PWM)
- Voltage level translation
- Digital systems
- Auxiliary Power Supply Isolated and Non-isolated