EPM7096LI84-15
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Package / Case | PLCC |
| Number of Pins | 84 |
| Published | 1998 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 84 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Additional Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 1.27mm |
| Frequency | 100MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 84 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 5V |
| Temperature Grade | INDUSTRIAL |
| Max Supply Voltage | 5.25V |
| Min Supply Voltage | 4.75V |
| Number of I/O | 68 |
| Memory Type | EEPROM |
| Propagation Delay | 15 ns |
| Frequency (Max) | 125MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 1800 |
| Number of Programmable I/O | 64 |
| Number of Logic Blocks (LABs) | 6 |
| Output Function | MACROCELL |
| Number of Macro Cells | 96 |
| JTAG BST | NO |
| In-System Programmable | NO |
| Height Seated (Max) | 5.08mm |
| RoHS Status | RoHS Compliant |
EPM7096LI84-15 Overview
This network has 96macro cells, which are cells that provide radio coverage provided by a high-power cell site (tower, antenna, mast).A PLCC package contains the item.It is programmed with 68 I/Os.It is programmed to terminate devices at [0].There is a QUADterminal position on the electrical part in question.A voltage of 5Vprovides power to the device.It belongs to the family [0].It is programmed with 84 pins.It is also possible to find CONFIGURABLE I/O OPERATION WITH 3.3V OR 5Vwhen using this device.As a building block for digital circuits, there are 1800gates.High efficiency requires the supply voltage to be maintained at [0].Data is stored using [0].This device is mounted by Surface Mount.A total of 84pins are provided on this board.With a maximum supply voltage of [0], it operates.Normally, it operates with a voltage of 4.75VV as its minimum supply voltage.There are 64 programmable I/Os in this system.You can achieve 100MHzfrequencies.It is recommended that the operating temperature be greater than -40°C.It is recommended that the operating temperature be lower than 85°C.In total, it contains 6 logic blocks (LABs).The maximal frequency should be lower than 125MHz.There are several types of programmable logic that can be categorized as EE PLD.
EPM7096LI84-15 Features
PLCC package
68 I/Os
84 pin count
84 pins
6 logic blocks (LABs)
EPM7096LI84-15 Applications
There are a lot of Altera EPM7096LI84-15 CPLDs applications.
- Software Configuration of Add-In Boards
- Code converters
- Pattern recognition
- Bootloaders for FPGAs
- USB Bus
- ON-CHIP OSCILLATOR CIRCUIT
- POWER-SAVING MODES
- Voltage level translation
- I2C BUS INTERFACE
- DDC INTERFACE