EPM7064SLI84-7
| Parameters | |
|---|---|
| Width | 29.3116mm |
| RoHS Status | Non-RoHS Compliant |
| Mounting Type | Surface Mount |
| Package / Case | 84-LCC (J-Lead) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tray |
| Series | MAX® 7000S |
| JESD-609 Code | e0 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 2 (1 Year) |
| Number of Terminations | 84 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 1.27mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | EPM7064 |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3/55V |
| Programmable Type | In System Programmable |
| Number of I/O | 68 |
| Clock Frequency | 166.7MHz |
| Propagation Delay | 7.5 ns |
| Number of Gates | 1250 |
| Output Function | MACROCELL |
| Number of Macro Cells | 64 |
| JTAG BST | YES |
| Voltage Supply - Internal | 4.5V~5.5V |
| Delay Time tpd(1) Max | 7.5ns |
| Number of Logic Elements/Blocks | 4 |
| Height Seated (Max) | 5.08mm |
| Length | 29.3116mm |
EPM7064SLI84-7 Overview
There are 64 macro cells in the network, which are high-power cell sites that provide radio coverage (tower, antenna, or mast) for a mobile phone network.The product is contained in a 84-LCC (J-Lead) package.In this case, there are 68 I/Os programmed.There are 84 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line.QUADis the terminal position of this electrical part.The power supply voltage is 5V.This part is part of the family [0].It is recommended that the chip be packaged by Tray.To ensure its reliability, the operating temperature is set to [0].Mount the chip by Surface Mount.In FPGA terms, it is a type of MAX? 7000Sseries FPGA.The EPM7064indicates that its related parts can be found.The 1250gates serve as building blocks for digital circuits.There are a total of 4 logic elements or blocks.The system runs on a power supply of 3.3/55V watts.The maximal supply voltage (Vsup) reaches 5.5V.clock frequency should not exceed [0].
EPM7064SLI84-7 Features
84-LCC (J-Lead) package
68 I/Os
The operating temperature of -40°C~85°C TA
3.3/55V power supplies
EPM7064SLI84-7 Applications
There are a lot of Intel EPM7064SLI84-7 CPLDs applications.
- STANDARD SERIAL INTERFACE UART
- Multiple DIP Switch Replacement
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- Programmable polarity
- Protection relays
- PULSE WIDTH MODULATION (PWM)
- Address decoding
- Address decoders
- Dedicated input registers
- Custom shift registers