EPM7064BFC100-7
| Parameters | |
|---|---|
| Factory Lead Time | 8 Weeks |
| Mount | Surface Mount |
| Package / Case | FBGA |
| Number of Pins | 100 |
| Published | 2014 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 100 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn63Pb37) |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Additional Feature | YES |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 235 |
| Supply Voltage | 2.5V |
| Terminal Pitch | 1mm |
| Frequency | 166.67MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 100 |
| Qualification Status | Not Qualified |
| Power Supplies | 1.8/3.32.5V |
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Number of I/O | 68 |
| Memory Type | EEPROM |
| Propagation Delay | 7.5 ns |
| Frequency (Max) | 303MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 1250 |
| Number of Programmable I/O | 68 |
| Number of Logic Blocks (LABs) | 4 |
| Output Function | MACROCELL |
| Number of Macro Cells | 64 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height Seated (Max) | 1.7mm |
| Length | 11mm |
| Width | 11mm |
| RoHS Status | RoHS Compliant |
EPM7064BFC100-7 Overview
There are 64 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.It is contained in package [0].It is programmed with 68 I/Os.It is programmed that device terminations will be 100 .This electrical part has a terminal position of [0], which serves as an important point of access for passengers and freight.The power source is powered by 2.5Vvolts.It belongs to the family [0].It has 100pins programmed.When using this device, YESis also available.In digital circuits, 1250gates serve as building blocks.It is recommended that data be stored in [0].This device is mounted by Surface Mount.The device is designed with pins [0].This device operates at a voltage of 3.6Vas its maximum supply voltage.Initially, it requires a voltage of 3Vas the minimum supply voltage.A total of 1.8/3.32.5V power supplies are needed to run it.There are 68 programmable I/Os, which are method of data transmissions, via input/output (I/O), between a central processing unit (CPU) and a peripheral device, such as a network adapter or a Parallel ATA storage device. A frequency of 166.67MHzcan be achieved.Ideally, the operating temperature should be greater than 0°C.The operating temperature should be lower than 70°C.Its basic building block is composed of 4 logic blocks (LABs).A maximum frequency of less than 303MHzis recommended.In programmable logic, a type of logic can be categorized as EE PLD.
EPM7064BFC100-7 Features
FBGA package
68 I/Os
100 pin count
100 pins
1.8/3.32.5V power supplies
4 logic blocks (LABs)
EPM7064BFC100-7 Applications
There are a lot of Altera EPM7064BFC100-7 CPLDs applications.
- Address decoding
- Power automation
- Battery operated portable devices
- Code converters
- DMA control
- Protection relays
- PULSE WIDTH MODULATION (PWM)
- D/T registers and latches
- Voltage level translation
- High speed graphics processing