EPM7064AETC100-7N
| Parameters | |
|---|---|
| Factory Lead Time | 10 Weeks |
| Mount | Surface Mount |
| Package / Case | TQFP |
| Number of Pins | 100 |
| Published | 1998 |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 100 |
| ECCN Code | EAR99 |
| Terminal Finish | Matte Tin (Sn) - annealed |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.5mm |
| Frequency | 166.67MHz |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Pin Count | 100 |
| Number of Outputs | 68 |
| Operating Supply Voltage | 3.3V |
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Number of I/O | 68 |
| Memory Type | EEPROM |
| Propagation Delay | 7.5 ns |
| Turn On Delay Time | 7.5 ns |
| Frequency (Max) | 222.2MHz |
| Architecture | PLA-TYPE |
| Programmable Logic Type | EE PLD |
| Number of Gates | 1250 |
| Number of Programmable I/O | 68 |
| Number of Logic Blocks (LABs) | 4 |
| Speed Grade | 7 |
| Output Function | MACROCELL |
| Number of Macro Cells | 64 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
EPM7064AETC100-7N Overview
There are 64 macro cells in the network, which are high-power cell sites that provide radio coverage (tower, antenna, or mast) for a mobile phone network.The item is packaged with TQFP.It is equipped with 68I/O ports.Terminations of devices are set to [0].As the terminal position of this electrical part is [0], it serves as an important access point for passengers and freight.Power is supplied by a voltage of 3.3V volts.It is a part of family [0].There are 100 pins on the chip.A digital circuit is built using 1250gates.High efficiency requires the supply voltage to be maintained at [0].It is adopted to store data in [0].Surface Mountis the mounting point of this electronic part.There are 100 pins embedded in the device.A voltage of 3.6V is the maximum supply voltage for this device.In order for it to operate, a supply voltage of 3Vis required.There are 68 programmable I/Os in this system.It is possible to achieve a frequency of 166.67MHz.It is recommended that the operating temperature exceeds 0°C.A temperature less than 70°Cshould be used for operation.There are 4 logic blocks (LABs) in its basic building block.It is recommended that the maximum frequency be less than 222.2MHz.It is possible to classify programmable logic as EE PLD.The output configuration is set to [0].
EPM7064AETC100-7N Features
TQFP package
68 I/Os
100 pin count
100 pins
4 logic blocks (LABs)
68 outputs
EPM7064AETC100-7N Applications
There are a lot of Altera EPM7064AETC100-7N CPLDs applications.
- Network Interface Card (NIC) and Host Bus Adapter (HBA)
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- DMA control
- POWER-SAVING MODES
- I/O PORTS (MCU MODULE)
- STANDARD SERIAL INTERFACE UART
- Code converters
- Custom state machines
- High speed graphics processing
- Multiple DIP Switch Replacement