| Parameters |
| Factory Lead Time |
12 Weeks |
| Mount |
Surface Mount |
| Package / Case |
FBGA |
| Number of Pins |
256 |
| Packaging |
Bulk |
| Published |
2003 |
| JESD-609 Code |
e0 |
| Pbfree Code |
no |
| Part Status |
Active |
| Moisture Sensitivity Level (MSL) |
3 |
| Number of Terminations |
256 |
| ECCN Code |
EAR99 |
| Max Operating Temperature |
85°C |
| Min Operating Temperature |
0°C |
| Additional Feature |
YES |
| Subcategory |
Programmable Logic Devices |
| Technology |
CMOS |
| Terminal Position |
BOTTOM |
| Terminal Form |
BALL |
| Peak Reflow Temperature (Cel) |
220 |
| Supply Voltage |
1.8V |
| Terminal Pitch |
1mm |
| Reach Compliance Code |
not_compliant |
| Frequency |
3.01205GHz |
| Time@Peak Reflow Temperature-Max (s) |
30 |
| Pin Count |
256 |
| Qualification Status |
Not Qualified |
| Operating Supply Voltage |
1.8V |
| Temperature Grade |
COMMERCIAL EXTENDED |
| Max Supply Voltage |
1.89V |
| Min Supply Voltage |
1.71V |
| Memory Size |
1kB |
| Operating Supply Current |
40mA |
| Number of I/O |
160 |
| Nominal Supply Current |
40mA |
| Memory Type |
FLASH |
| Propagation Delay |
5.4 ns |
| Turn On Delay Time |
5.4 ns |
| Frequency (Max) |
304MHz |
| Number of Logic Elements/Cells |
570 |
| Number of Programmable I/O |
160 |
| Number of Logic Blocks (LABs) |
57 |
| Speed Grade |
3 |
| Output Function |
MACROCELL |
| Number of Macro Cells |
440 |
| JTAG BST |
YES |
| In-System Programmable |
YES |
| Height |
1.8mm |
| Length |
17mm |
| Width |
17mm |
| RoHS Status |
Non-RoHS Compliant |
| Lead Free |
Contains Lead |
EPM570GF256C3 Overview
In the mobile phone network, there are 440macro cells, which are cells with high-power antennas and towers.The product is contained in a FBGA package.The device is programmed with 160 I/Os.It is programmed that device terminations will be 256 .Its terminal position is BOTTOM.Power is supplied by a voltage of 1.8V volts.It is a part of the family [0].It is packaged in the way of Bulk.Chips are programmed with 256 pins.If you use this device, you will also find [0].In order to maintain high efficiency, the supply voltage should be maintained at [0].Data storage is performed using [0].The electronic component is mounted by Surface Mount.The 256pins are designed into the board.A maximum voltage of 1.89Vis required for operation.The device is designed to operate with a minimal supply voltage of 1.71VV.There are 160 programmable I/Os, which are method of data transmissions, via input/output (I/O), between a central processing unit (CPU) and a peripheral device, such as a network adapter or a Parallel ATA storage device. A frequency of 3.01205GHzcan be achieved.It is recommended that the operating temperature be higher than 0°C.It is recommended that the operating temperature be below 85°C.The system consists of 57 logic blocks (LABs).There are 570 logic elements/cells to form a fundamental building block. It is recommended that the maximal frequency be less than 0.Using the devices' 1kBmemory, programs and data can be stored.
EPM570GF256C3 Features
FBGA package
160 I/Os
256 pin count
256 pins
57 logic blocks (LABs)
EPM570GF256C3 Applications
There are a lot of Altera EPM570GF256C3 CPLDs applications.
- Programmable polarity
- ON-CHIP OSCILLATOR CIRCUIT
- Network Interface Card (NIC) and Host Bus Adapter (HBA)
- PULSE WIDTH MODULATION (PWM)
- Synchronous or asynchronous mode
- Timing control
- PLC analog input modules
- Handheld digital devices
- Page register
- Custom shift registers